Trap generation and progressive wearout in thin HfSiON
Authors:
- R. DegraeveRDR. Degraeve
- F. CrupiFCF. Crupi
- B. KaezerBKB. Kaezer
- G. GroesenekenGGG. Groeseneken
- H. MaesHMH. Maes
- B. KaczerBKB. Kaczer
- 16 August 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 15417026,p. 45-49
Abstract
The degradation and time-to-breakdown characteristics of thin (1.38 to 2.14 nm EOT) MOCVD HfSiON dielectrics with poly-Si gate were studied. We demonstrate that at elevated temperature the conduction mechanism remains direct tunneling and that for EOT below 1.5 nm charge trapping is no reliability issue. It is shown that similar to the case of SiON dielectrics, the degradation process is dominated by the formation of single localized conductions paths and that the total time-to-failure consists of two parts: the time-to-creation of a conductive path and the time until the wearout of this path has reached a critical threshold. The degradation rate of the progressive wearout is strongly voltage dependent. For thin (1.38 nm EOT) HfSiON we demonstrate that the time-to-creation even at operating condition is very small, but the overall TDDB reliability is guaranteed because of the large time-to-wearout.Keywords
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