Cryogenic characterization of 28 nm bulk CMOS technology for quantum computing
- 1 September 2017
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 62-65
Abstract
This paper presents the first experimental investigation and physical discussion of the cryogenic behavior of a commercial 28 nm bulk CMOS technology. Here we extract the fundamental physical parameters of this technology at 300,77 and 4.2 K based on DC measurement results. The extracted values are then used to demonstrate the impact of cryogenic temperatures on the essential analog design parameters. We find that the simplified charge-based EKV model can accurately predict the cryogenic behavior. This represents a main step towards the design of analog/RF circuits integrated in an advanced bulk CMOS process and operating at cryogenic temperature for quantum computing control systems.Keywords
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This publication has 9 references indexed in Scilit:
- Cryo-CMOS for quantum computing2016
- A CMOS silicon spin qubitNature Communications, 2016
- Impact of GigaRad Ionizing Dose on 28 nm bulk MOSFETs for future HL-LHC2016
- GigaRad total ionizing dose and post-irradiation effects on 28 nm bulk MOSFETs2016
- Low-power analog/RF circuit design based on the inversion coefficient2015
- A single-atom electron spin qubit in siliconNature, 2012
- Effects of cryogenic temperatures on small-signal MOSFET capacitances2007
- Tradeoffs and Optimization in Analog CMOS Design2007
- New method for the extraction of MOSFET parametersElectronics Letters, 1988