Fabrication and Switching Performance of 8 A–500 V D‐Mode GaN MISHEMTs

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Abstract
In this work, the design, fabrication, static device testing, and double‐pulse switching performance of multi‐finger D‐mode GaN metal–insulator–semiconductor high‐electron‐mobility transistors (MISHEMTs) on silicon are discussed. Utilizing an metal‐organic chemical vapor deposition‐grown GaN high‐electron‐mobility transistors stack with a superlattice buffer, field‐plated devices with a meandering gate geometry and a total gate width of 30 mm are fabricated. Plasma enhanced chemical vapor deposition SiNx is used as the gate dielectric, followed by an optimized bilayer SiNx passivation scheme. Devices with 100 μm gate width have an ON/OFF ratio of ≈108. They are analyzed for dynamic Ron (normalized Ron = 3 at 100 μs) and time‐dependent dielectric breakdown for gate reliability, resulting in a β value of 2.65 from the Weibull plot. Devices with a 30 mm gate width exhibit a maximum ON current of 8 A at zero gate voltage and a three‐terminal breakdown of ≈500 V. The devices are diced, wire‐bonded to a printed circuit board, and a double‐pulsed test is performed for switching transient characterization under clamped inductive load. The OFF‐state and ON‐state energy loss are estimated to be Eon = 14 μJ and EOFF = 27 μJ, respectively, when switched at 5 A, 50 V. In this study, the potential of GaN MISHEMTs with bilayer SiNx passivation for low‐power D‐mode switching applications (5 A, 50 V) is demonstrated.

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