Zero voltage switching in the PWM half bridge topology with complementary control and synchronous rectification
Authors:
- O. GarciaOGO. Garcia
- J.A. CobosJCJ.A. Cobos
- J. UcedaJUJ. Uceda
- J. SebastianJ. Sebastian
- 1 June 1995
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 1, 286-291
Abstract
No abstract availableThis publication has 4 references indexed in Scilit:
- Optimized synchronous rectification stage for low output voltage (3.3 V) DC/DC conversion1994
- RCD clamp PWM forward converter with self driven synchronous rectification1993
- Active clamp PWM forward converter with self driven synchronous rectification1993
- Asymmetrical duty cycle permits zero switching loss in PWM circuits with no conduction loss penaltyIEEE Transactions on Industry Applications, 1993