Abstract
Physical attacks on secure devices can leak sensitive data and have significant consequences for individuals, companies, and governments. Today, much research is centered around understanding hardware weaknesses and vulnerabilities and, in turn, designing countermeasures to increase system security. One such countermeasure is the implementation of the camouflaging gate called PG-TVD (pass gate-based threshold voltage defined), which ensures protection against reverse engineering and sidechannel attacks. However, proper investigation is needed to determine if the countermeasure opens the door to other powerful attacks, such as laser fault injection (LFI) attacks. Identifying the vulnerability against this attack requires a proper assessment. As the first attempt to understand laser sensitivity in PG-TVD, we develop a workflow for assessing a circuit layout's sensitivity to LFI. We use this workflow to analyze the PG-TVD, giving the laser-sensitive areas. A deeper understanding of how to protect devices can be gained from this assessment to keep sensitive data secure. From the information obtained by our workflow, we also propose, design, and simulate a mitigation scheme that mitigates the laser sensitivity in PG-TVD logic cells by approximately 83%.
Funding Information
  • National Science Foundation (CCF-2221742)