Reconfigurable system for high-speed and diversified AES using FPGA
Authors:
- Ming-Haw JingMJMing-Haw Jing
- Zih-Heng ChenZCZih-Heng Chen
- Jian-Hong ChenJCJian-Hong Chen
- Yan-Haw ChenYCYan-Haw Chen
- 1 March 2007
- journal article
- Published by Elsevier in Microprocessors and Microsystems
- Vol. 31 (2) , 94-102
Abstract
No abstract availableThis publication has 21 references indexed in Scilit:
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