A RISC-V-Based High-Throughput Accelerator for Sparse Winograd CNN Inference on FPGA
- 17 January 2025
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Embedded Systems Letters
- Vol. 17 (4) , 256-259
Abstract
This paper proposes a RISC-V-based accelerator for inferring a model that uses Efficient Sparse Winograd Convolutional Neural Networks. This accelerator consists of a RISC-V processor (AndesNX27V) and a coprocessor; the latter performs the Winograd-ReLU convolutions and fully connected layers of the network. The pooling and ReLU layers of the network are executed by the processor in parallel with the coprocessor to increase throughput. In addition, on-chip buffers are used for the input/output data and filter weights to ensure pipelined operation. Implemented on an AMD VCU118 FPGA platform operating at 250 MHz, the accelerator achieves an average throughput of 5104.6 GOP/s when inferring a VGG16-based model.Keywords
Funding Information
- National Science and Technology Council, Taiwan (NSTC 112-2221-E-A49-150, NSTC 113-2622-8-A49-012-SB)
- Higher Education Sprout Project of the National Yang Ming Chiao Tung University and Ministry of Education (MOE), Taiwan
This publication has 13 references indexed in Scilit:
- Optimizing CNN Computation Using RISC-V Custom Instruction Sets for Edge PlatformsIEEE Transactions on Computers, 2024
- Customized Instruction on RISC-V for Winograd-Based Convolution Acceleration2021
- SWM: A High-Performance Sparse-Winograd Matrix Multiplication CNN AcceleratorIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2021
- WinoNN: Optimizing FPGA-Based Convolutional Neural Network Accelerators Using Sparse Winograd AlgorithmIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020
- A Latency-Optimized Reconfigurable NoC for In-Memory Acceleration of DNNsIEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2020
- A Power-Efficient Optimizing Framework FPGA Accelerator Based on Winograd for YOLOIEEE Access, 2020
- Eyeriss v2: A Flexible Accelerator for Emerging Deep Neural Networks on Mobile DevicesIEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2019
- Xception: Deep Learning with Depthwise Separable Convolutions2017
- Evaluating Fast Algorithms for Convolutional Neural Networks on FPGAs2017
- Fast Algorithms for Convolutional Neural Networks2016