Mateus Beck Rutzig

The complexity of digital hardware design has been increasing with the scale of CMOS technology. Thus, front-end design and verification teams face demands for modularity and traceability to shrink tape-out time and avoid failures on functional verification process. However, the employment of non-standard practices of project management in HDL-based workflows have long been spread in the microelectronics community. This work proposes a version control and continuous integration pipeline methodologies based on Gitflow aiming to improve collaboration between front-end and verification teams focusing on ASIC designs. By employing such an approach in a blueMacaw Microcontroller project, which resulted in a 22 nm tape-out, we achieved a highly effective workflow that ensured early error detection, traceability and strong team integration.

Cloud Warehouses are evolving with diverse computational resources, including CPUs, GPUs, and accelerators, catering to a multitude of tenant applications. While this heterogeneity promises improved performance and energy efficiency, harnessing its full potential poses challenges due to dynamic workload characteristics and variable application demands. To address this, scheduling approaches combined with optimization techniques like Dynamic Voltage and Frequency Scaling (DVFS) are crucial. However, integrating these approaches effectively can be complex, potentially leading to conflicts and diminished benefits. This research proposes two frameworks, EAPECloud and EAPECloud-DVFS, designed for energy-aware collaborative provisioning in heterogeneous CPU-GPU cloud nodes. The first approach reduces energy consumption by selecting and maintaining a static combination of the best scheduler and V-F pair for most workloads. The second approach goes further by dynamically adjusting the V-F pair of each device using DVFS techniques while selecting the optimal scheduler. While the static approach delivers strong results in most cases, the dynamic strategy achieves even greater energy savings, albeit with an additional convergence time to determine the optimal V-F pair. Although each framework has distinct advantages and use cases, our findings demonstrate that both approaches effectively reduce energy consumption in heterogeneous environments, with EAPECloud-DVFS achieving up to a 126.33% performance improvement compared to the Linux CPU Governor, highlighting its efficiency and applicability in real-time systems.

Cloud Warehouses are evolving with diverse computational resources, including CPUs, GPUs, and accelerators, catering to a multitude of tenant applications. While this heterogeneity promises improved performance and energy effciency, harnessing its full potential poses challenges due to dynamic workload characteristics and variable application demands. To address this, scheduling approaches combined with optimization techniques like Dynamic Voltage and Frequency Scaling (DVFS) are crucial. However, integrating these approaches effectively can be complex, potentially leading to conflicts and diminished benefits. This research proposes two frameworks, EAPECloud and EAPECloud-DVFS, designed for energy-aware collaborative provisioning in heterogeneous CPU-GPU cloud nodes. The first approach reduces energy consumption by selecting and maintaining a static combination of the best scheduler and V-F pair for most workloads. The second approach goes further by dynamically adjusting the V-F pair of each device using DVFS techniques while selecting the optimal scheduler. While the static approach delivers strong results in most cases, the dynamic strategy achieves even greater energy savings, albeit with an additional convergence time to determine the optimal V-F pair. Although each framework has distinct advantages and use cases, our findings demonstrate that both approaches effectively reduce energy consumption in heterogeneous environments, with EAPECloud-DVFS achieving up to a 126.33% performance improvement compared to the Linux CPU Governor, highlighting its effciency and applicability in real-time systems.

Multi-Processor Systems-on-Chip (MPSoCs) have been established as the standard platform for high-performance applications in the semiconductor industry. With an increasing number of Processing Elements (PEs) in a single die, communication scalability is one of the foremost concerns. Networks-on-Chip (NoCs) has already shown to be an alternative to provide scalability, but relies on homogeneous communication fashion which cannot be ideal to heterogeneous communication demand of current embedded devices. Hybrid communication structures can mitigate such issues by merging different communication structures that can better accommodate heterogeneous communication rates. In this work, an Hybrid Communication Infrastructure is proposed by merging fully- partially- and peer to peer connected fabrics providing a wide range of communication bandwidth. In addition, we coupled to the hybrid fabric, a multi-grained DVFS approach that dynamically adapts voltage and frequency of the structures considering the application's performance needs. Results shows that the Hybrid structure achieves up to 22% power savings and occupied 42% less chip area than a NoC with the same number of PEs. Experiments with relevant video encoding applications show power savings of up to 70% over a homogeneous NoC, with no significant throughput losses, both coupled to the proposed DVFS approach.

Cloud Environments have been constantly adopting collaborative CPU-FPGA architectures to accelerate applications by partitioning the execution of their kernels across both devices. However, exploiting the optimization techniques that both archi-tectures offer is challenging, so they must be smartly employed depending on the application at hand and the target optimization (e.g., performance or energy). Given that, this work investigates the impact of collaboratively applying thread throttling (i.e. artificially decreasing the number of active threads) on the CPU side and HLS (High-Level Synthesis)-versioning on the FPGA side. We use a multi-tenant Cloud service as our object of study, where sequence of application requests with different priorities result in DAGs of application kernels that must be executed over the heterogeneous architecture. We show that by synergistically applying thread throttling and HLS-versioning to the incoming kernels may improve the Energy-Dealy product in up to 41x over the default and non-optimized execution.

Cloud Warehouses have been exploiting CPU-FPGA environments to accelerate multi-tenant applications to achieve scalability and maximize resource utilization. In this scenario, kernels are sent to CPU and FPGA concurrently, considering available resources and workload characteristics, which are highly variant. Therefore, we propose a multi-objective optimization strategy to improve resource provisioning in CPU-FPGA environments. It is based on the Genetic Multidimensional Knapsack solution and can be tuned to minimize makespan or energy. Our strategy provides similar results as the optimal Exhaustive Search, but with feasible execution time, while presenting 77% energy savings with 39% lower makespan than the commonly-used First-Fit strategy.