Keyvan Narimani
Keyvan Narimani has a total of 18 co-authors. Here are the top co-authors by number of shared publications:
- Qing-Tai Zhao
Peter Grünberg Institute 9, Forschungszentrum Jülich
2 shared publications - Siegfried Mantl
Peter Grünberg Institute 9 (PGI 9) and JARA-Fundamentals of Future Information Technologies 1 , Forschungszentrum Juelich, 52425 Juelich, Germany
2 shared publications - Andreas Tiedemann
Peter-Grünberg-Institute (PGI 9), JARA-Fundamentals for Future Technology, Forschungszentrum Jülich, 52428 Jülich, Germany
1 shared publication André Klümpen
Lower Saxony State Tax Office
1 shared publication- Dan Buca
Forschungszentrum Jülich
1 shared publication - Gregor Mussler
Forschungszentrum Jülich
1 shared publication
Latest Publications
- 2 September 2026
- Published by Springer Nature
- p. 61-70
Tax Defense Analytics: A Data-Driven Application for Identifying Cross-Border VAT Fraud and Tax Avoidance Schemes
- 2 September 2026
- Published by Springer Nature
- p. 61-70
Tax Defense Analytics: A Data-Driven Application for Identifying Cross-Border VAT Fraud and Tax Avoidance Schemes
- Open Access
- 26 April 2018
- Published by MDPI AG in Applied Sciences
- Vol. 8 (5) , 670
Strained Silicon Single Nanowire Gate-All-Around TFETs with Optimized Tunneling Junctions
In this work, we demonstrate a strained Si single nanowire tunnel field effect transistor (TFET) with gate-all-around (GAA) structure yielding Ion-current of 15 μA/μm at the supply voltage of Vdd = 0.5V with linear onset at low drain voltages. The subthreshold swing (SS) at room temperature shows an average of 76 mV/dec over 4 orders of drain current Id from 5 × 10−6 to 5 × 10−2 µA/µm. Optimized devices also show excellent current saturation, an important feature for analog performance.
- 26 April 2018
- Published by MDPI AG in Applied Sciences
- Vol. 8 (5) , 670
Open AccessStrained Silicon Single Nanowire Gate-All-Around TFETs with Optimized Tunneling Junctions
In this work, we demonstrate a strained Si single nanowire tunnel field effect transistor (TFET) with gate-all-around (GAA) structure yielding Ion-current of 15 μA/μm at the supply voltage of Vdd = 0.5V with linear onset at low drain voltages. The subthreshold swing (SS) at room temperature shows an average of 76 mV/dec over 4 orders of drain current Id from 5 × 10−6 to 5 × 10−2 µA/µm. Optimized devices also show excellent current saturation, an important feature for analog performance.
- 1 February 2018
- Published by ISTE Group in Composants nanoélectroniques
- Vol. 18 (1)
SiGe based line tunneling field-effect transistors
In this paper we report on our progress with SiGe gate-normal / line tunneling FETs, highlighting recent advancements by the example of three transistor concepts. We demonstrate the unique (...)
- 1 February 2018
- Published by ISTE Group in Composants nanoélectroniques
- Vol. 18 (1)
SiGe based line tunneling field-effect transistors
In this paper we report on our progress with SiGe gate-normal / line tunneling FETs, highlighting recent advancements by the example of three transistor concepts. We demonstrate the unique (...)
- 1 November 2016
- Published by Elsevier in Thin Solid Films
- Vol. 619, 41-47
Thermoelectric energy harvesting using array of vertically aligned Al-doped ZnO nanorods
- 1 November 2016
- Published by Elsevier in Thin Solid Films
- Vol. 619, 41-47
Thermoelectric energy harvesting using array of vertically aligned Al-doped ZnO nanorods