Andreas Wallraff
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Research Subjects
Andreas Wallraff has a total of 282 co-authors. Here are the top co-authors by number of shared publications:
- Christoph Hellings
Department of Physics, ETH Zürich, Zürich, Switzerland
15 shared publications - Jean-Claude Besse
Department of Physics, ETH Zürich, Zürich, Switzerland
14 shared publications - Ants Remm
ETH Zurich
12 shared publications Christopher Eichler
ETH Zurich
11 shared publications- Alexandre Blais
Université de Sherbrooke
10 shared publications Graham J. Norris
ETH Zurich
9 shared publications
Latest Publications
- Open Access
- 27 May 2026
- Published by Springer Nature in Nature
- Vol. 653 (8116) , 1033-1038
Experimental randomness amplification
Realistic quantum information processing devices are inherently imperfect, leading to computational errors that require quantum error correction. Likewise, random bits generated by such devices are flawed and must be enhanced to be usable for applications such as generating cryptographic keys. This enhancement of randomness quality is achieved through a protocol known as randomness amplification 1 . Here we report on an experiment that implements such a protocol. Randomness amplification is device-independent, making no assumptions about the internal workings of the quantum devices. It requires executing a loophole-free Bell test 2–4 within a specific parameter regime that involves both a high Bell violation and a high repetition rate. The experimental demonstration is made possible by a combination of theoretical advances, which allow for protocols with an experimentally realistic parameter regime, and experimental progress that achieves this regime with superconducting circuits. Crucially, randomness amplification has been proven to be impossible by purely classical means 5 . This experiment therefore demonstrates a definitive quantum advantage—leveraging quantum technology to accomplish a task unattainable by classical information processing.
- 27 May 2026
- Published by Springer Nature in Nature
- Vol. 653 (8116) , 1033-1038
Open AccessExperimental randomness amplification
Realistic quantum information processing devices are inherently imperfect, leading to computational errors that require quantum error correction. Likewise, random bits generated by such devices are flawed and must be enhanced to be usable for applications such as generating cryptographic keys. This enhancement of randomness quality is achieved through a protocol known as randomness amplification 1 . Here we report on an experiment that implements such a protocol. Randomness amplification is device-independent, making no assumptions about the internal workings of the quantum devices. It requires executing a loophole-free Bell test 2–4 within a specific parameter regime that involves both a high Bell violation and a high repetition rate. The experimental demonstration is made possible by a combination of theoretical advances, which allow for protocols with an experimentally realistic parameter regime, and experimental progress that achieves this regime with superconducting circuits. Crucially, randomness amplification has been proven to be impossible by purely classical means 5 . This experiment therefore demonstrates a definitive quantum advantage—leveraging quantum technology to accomplish a task unattainable by classical information processing.
- Top Cited PapersOpen Access
- 11 February 2026
- Published by Springer Nature in EPJ Quantum Technology
- Vol. 13 (1)
Performance characterization of a multi-module quantum processor with static inter-chip couplers
Three-dimensional integration technologies such as flip-chip bonding are a key prerequisite to realize large-scale superconducting quantum processors. Modular architectures, in which circuit elements are spread over multiple chips, can further improve scalability and performance by enabling the integration of elements with different substrates or fabrication processes, by increasing the fabrication yield of completed devices, and by physically separating the qubits onto distinct modules to avoid correlated errors mediated by a common substrate. We present a design for a multi-chip module comprising one carrier chip and four qubit modules. Measuring two of the qubits, we analyze the readout performance, finding a mean three-level state-assignment error of $9 \times 10^{-3}$ in 200 ns. We calibrate single-qubit gates and measure a mean simultaneous randomized benchmarking error of $6 \times 10^{-4}$ , consistent with the coherence times of the qubits. Using a wiring-efficient static inter-module coupler featuring galvanic inter-chip transitions, we demonstrate a controlled-Z two-qubit gate in 100 ns with an error of $7 \times 10^{-3}$ extracted from interleaved randomized benchmarking. Three-dimensional integration, as presented here, will continue to contribute to improving the performance of gates and readout as well as increasing the qubit count in future superconducting quantum processors.- 11 February 2026
- Published by Springer Nature in EPJ Quantum Technology
- Vol. 13 (1)
Top Cited PapersOpen AccessPerformance characterization of a multi-module quantum processor with static inter-chip couplers
Three-dimensional integration technologies such as flip-chip bonding are a key prerequisite to realize large-scale superconducting quantum processors. Modular architectures, in which circuit elements are spread over multiple chips, can further improve scalability and performance by enabling the integration of elements with different substrates or fabrication processes, by increasing the fabrication yield of completed devices, and by physically separating the qubits onto distinct modules to avoid correlated errors mediated by a common substrate. We present a design for a multi-chip module comprising one carrier chip and four qubit modules. Measuring two of the qubits, we analyze the readout performance, finding a mean three-level state-assignment error of $9 \times 10^{-3}$ in 200 ns. We calibrate single-qubit gates and measure a mean simultaneous randomized benchmarking error of $6 \times 10^{-4}$ , consistent with the coherence times of the qubits. Using a wiring-efficient static inter-module coupler featuring galvanic inter-chip transitions, we demonstrate a controlled-Z two-qubit gate in 100 ns with an error of $7 \times 10^{-3}$ extracted from interleaved randomized benchmarking. Three-dimensional integration, as presented here, will continue to contribute to improving the performance of gates and readout as well as increasing the qubit count in future superconducting quantum processors. - Top Cited PapersOpen Access
- 30 January 2026
- Published by Springer Nature in Nature Physics
- Vol. 22 (2) , 189-194
Lattice surgery realized on two distance-three repetition codes with superconducting qubits
Quantum error correction is needed for quantum computers to be capable of executing algorithms using hundreds of logical qubits in a fault-tolerant manner. Recent experiments have progressed towards this by demonstrating sufficiently low error rates for state preservation of a single logical qubit. However, quantum computation algorithms also require that these logical qubits can be entangled and that gate operations can be performed on them. Lattice surgery is a technique that offers a practical approach for implementing such gates, particularly in planar quantum processor layouts. Here we demonstrate lattice surgery between two distance-three repetition-code qubits by splitting a single distance-three surface-code qubit. Using a quantum circuit that is fault-tolerant for bit-flip errors, we achieve an improvement in the value of the decoded Z Z logical two-qubit observable compared with a similar non-encoded circuit. We therefore demonstrate the functional building blocks needed for lattice-surgery operations on larger-distance codes based on superconducting circuits.
- 30 January 2026
- Published by Springer Nature in Nature Physics
- Vol. 22 (2) , 189-194
Top Cited PapersOpen AccessLattice surgery realized on two distance-three repetition codes with superconducting qubits
Quantum error correction is needed for quantum computers to be capable of executing algorithms using hundreds of logical qubits in a fault-tolerant manner. Recent experiments have progressed towards this by demonstrating sufficiently low error rates for state preservation of a single logical qubit. However, quantum computation algorithms also require that these logical qubits can be entangled and that gate operations can be performed on them. Lattice surgery is a technique that offers a practical approach for implementing such gates, particularly in planar quantum processor layouts. Here we demonstrate lattice surgery between two distance-three repetition-code qubits by splitting a single distance-three surface-code qubit. Using a quantum circuit that is fault-tolerant for bit-flip errors, we achieve an improvement in the value of the decoded Z Z logical two-qubit observable compared with a similar non-encoded circuit. We therefore demonstrate the functional building blocks needed for lattice-surgery operations on larger-distance codes based on superconducting circuits.
- Top Cited PapersOpen Access
- 16 January 2026
- Published by American Physical Society (APS) in Physical Review Research
- Vol. 8 (1)
Experimentally informed decoding of stabilizer codes based on syndrome correlations
High-fidelity decoding of quantum error correction codes relies on an accurate experimental model of the physical errors occurring in the device. Because error probabilities can depend on the context of the applied operations, the error model is ideally calibrated using the same circuit as is used for the error correction experiment. Here, we present an experimental approach guided by an analytical formula to characterize the probability of independent errors using correlations in the syndrome data generated by executing the error correction circuit. Using the method on a distance-three surface code, we analyze error channels that flip an arbitrary number of syndrome elements, including Pauli Y ̂ errors, hook errors, multiqubit errors, and leakage, in addition to standard Pauli X ̂ and Z ̂ errors. We use the method to find the optimal weights for a minimum-weight perfect matching decoder without relying on a theoretical error model. Additionally, we investigate whether improved knowledge of the Pauli Y ̂ error channel, based on correlating the X- and Z-type error syndromes, can be exploited to enhance matching decoding. Furthermore, we find correlated errors that flip many syndrome elements over up to eight cycles, potentially caused by leakage of the data qubits out of the computational subspace. The presented method provides the tools for accurately calibrating a broad family of decoders, beyond the minimum-weight perfect matching decoder, without relying on prior knowledge of the error model.
- 16 January 2026
- Published by American Physical Society (APS) in Physical Review Research
- Vol. 8 (1)
Top Cited PapersOpen AccessExperimentally informed decoding of stabilizer codes based on syndrome correlations
High-fidelity decoding of quantum error correction codes relies on an accurate experimental model of the physical errors occurring in the device. Because error probabilities can depend on the context of the applied operations, the error model is ideally calibrated using the same circuit as is used for the error correction experiment. Here, we present an experimental approach guided by an analytical formula to characterize the probability of independent errors using correlations in the syndrome data generated by executing the error correction circuit. Using the method on a distance-three surface code, we analyze error channels that flip an arbitrary number of syndrome elements, including Pauli Y ̂ errors, hook errors, multiqubit errors, and leakage, in addition to standard Pauli X ̂ and Z ̂ errors. We use the method to find the optimal weights for a minimum-weight perfect matching decoder without relying on a theoretical error model. Additionally, we investigate whether improved knowledge of the Pauli Y ̂ error channel, based on correlating the X- and Z-type error syndromes, can be exploited to enhance matching decoding. Furthermore, we find correlated errors that flip many syndrome elements over up to eight cycles, potentially caused by leakage of the data qubits out of the computational subspace. The presented method provides the tools for accurately calibrating a broad family of decoders, beyond the minimum-weight perfect matching decoder, without relying on prior knowledge of the error model.
- Open Access
- 16 December 2025
- Published by American Physical Society (APS) in PRX Quantum
- Vol. 6 (4)
Resource-Efficient Cross-Platform Verification with Modular Superconducting Devices
Large-scale quantum computers are expected to benefit from modular architectures. Validating the capabilities of modular devices requires benchmarking strategies that assess performance within and between modules. In this work, we evaluate cross-platform verification protocols, which are critical for quantifying how accurately different modules prepare the same quantum state—a key requirement for modular scalability and system-wide consistency. We demonstrate these algorithms using a six-qubit flip-chip superconducting quantum device consisting of two 3-qubit modules on a single carrier chip, with connectivity for intra- and intermodule entanglement. We examine how the resource requirements of protocols relying solely on classical communication between modules scale exponentially with qubit number, and demonstrate that introducing an intermodule two-qubit gate enables subexponential scaling in cross-platform verification. This approach reduces the number of repetitions required by a factor of 4 for three-qubit states, with greater reductions projected for larger and higher-fidelity devices.
- 16 December 2025
- Published by American Physical Society (APS) in PRX Quantum
- Vol. 6 (4)
Open AccessResource-Efficient Cross-Platform Verification with Modular Superconducting Devices
Large-scale quantum computers are expected to benefit from modular architectures. Validating the capabilities of modular devices requires benchmarking strategies that assess performance within and between modules. In this work, we evaluate cross-platform verification protocols, which are critical for quantifying how accurately different modules prepare the same quantum state—a key requirement for modular scalability and system-wide consistency. We demonstrate these algorithms using a six-qubit flip-chip superconducting quantum device consisting of two 3-qubit modules on a single carrier chip, with connectivity for intra- and intermodule entanglement. We examine how the resource requirements of protocols relying solely on classical communication between modules scale exponentially with qubit number, and demonstrate that introducing an intermodule two-qubit gate enables subexponential scaling in cross-platform verification. This approach reduces the number of repetitions required by a factor of 4 for three-qubit states, with greater reductions projected for larger and higher-fidelity devices.
- Open Access
- 7 November 2025
- Published by American Physical Society (APS) in Physical Review Research
- Vol. 7 (4) , 043142
Calibrating magnetic flux control in superconducting circuits by compensating distortions on timescales from nanoseconds up to tens of microseconds
Fast tuning of the transition frequency of superconducting qubits using magnetic flux is essential, for example, for realizing high-fidelity two-qubit gates with low leakage or for reducing errors in dispersive qubit readout. To apply accurately shaped flux pulses, signal distortions induced by the flux control lines need to be carefully compensated for. This requires their characterization at the reference plane of the qubit. However, many existing approaches are limited in time resolution or in pulse duration. Here, we overcome these limitations and demonstrate accurate flux control with subpermille residual frequency errors on timescales ranging from nanoseconds to tens of microseconds. We achieve this by combining two complementary methods to characterize and compensate for pulse distortions. We have deployed this approach successfully in a quantum error correction experiment calibrating 24 flux-activated two-qubit gates. Reliable calibration methods, as the ones presented here, are essential in experiments scaling up superconducting quantum processors.
- 7 November 2025
- Published by American Physical Society (APS) in Physical Review Research
- Vol. 7 (4) , 043142
Open AccessCalibrating magnetic flux control in superconducting circuits by compensating distortions on timescales from nanoseconds up to tens of microseconds
Fast tuning of the transition frequency of superconducting qubits using magnetic flux is essential, for example, for realizing high-fidelity two-qubit gates with low leakage or for reducing errors in dispersive qubit readout. To apply accurately shaped flux pulses, signal distortions induced by the flux control lines need to be carefully compensated for. This requires their characterization at the reference plane of the qubit. However, many existing approaches are limited in time resolution or in pulse duration. Here, we overcome these limitations and demonstrate accurate flux control with subpermille residual frequency errors on timescales ranging from nanoseconds to tens of microseconds. We achieve this by combining two complementary methods to characterize and compensate for pulse distortions. We have deployed this approach successfully in a quantum error correction experiment calibrating 24 flux-activated two-qubit gates. Reliable calibration methods, as the ones presented here, are essential in experiments scaling up superconducting quantum processors.
- Open Access
- 24 October 2025
- Published by American Physical Society (APS) in PRX Quantum
- Vol. 6 (4)
Realizing a Continuous Set of Two-Qubit Gates Parameterized by an Idle Time
Continuous gate sets are a key ingredient for near-term quantum algorithms. Here, we demonstrate a hardware-efficient, continuous set of controlled arbitrary-phase ( CZ θ ) gates acting on flux-tunable transmon qubits. This implementation is robust to control pulse distortions on time scales longer than the duration of the gate, making it suitable for deep quantum circuits. Our calibration procedure makes it possible to parameterize the continuous gate set with a single control parameter, the idle time between the two rectangular halves of the net-zero control pulse. For calibration and characterization, we develop a leakage measurement based on coherent amplification, and a new cycle design for cross-entropy benchmarking. We demonstrate gate errors of 0.7 % and leakage of 4 × 10 − 4 across the entire gate set. This native gate set has the potential to reduce the depth and improve the performance of near-term quantum algorithms compared to decompositions into CZ π gates and single-qubit gates. Moreover, we expect the calibration and benchmarking methods to find further possible applications.
- 24 October 2025
- Published by American Physical Society (APS) in PRX Quantum
- Vol. 6 (4)
Open AccessRealizing a Continuous Set of Two-Qubit Gates Parameterized by an Idle Time
Continuous gate sets are a key ingredient for near-term quantum algorithms. Here, we demonstrate a hardware-efficient, continuous set of controlled arbitrary-phase ( CZ θ ) gates acting on flux-tunable transmon qubits. This implementation is robust to control pulse distortions on time scales longer than the duration of the gate, making it suitable for deep quantum circuits. Our calibration procedure makes it possible to parameterize the continuous gate set with a single control parameter, the idle time between the two rectangular halves of the net-zero control pulse. For calibration and characterization, we develop a leakage measurement based on coherent amplification, and a new cycle design for cross-entropy benchmarking. We demonstrate gate errors of 0.7 % and leakage of 4 × 10 − 4 across the entire gate set. This native gate set has the potential to reduce the depth and improve the performance of near-term quantum algorithms compared to decompositions into CZ π gates and single-qubit gates. Moreover, we expect the calibration and benchmarking methods to find further possible applications.
- Open Access
- 28 August 2025
- Published by American Physical Society (APS) in Physical Review Applied
- Vol. 24 (2)
Constant-depth fan-out with real-time feedforward on a superconducting quantum processor
When using unitary gate sequences, the growth in depth of many quantum circuits with output size poses significant obstacles to practical quantum computation. The quantum fan-out operation, which reduces the circuit depth of quantum algorithms such as the quantum Fourier transform and Shor’s algorithm, is an example that can be realized in constant depth independent of the output size. Here, we demonstrate a quantum fan-out gate with real-time feedforward on up to four output qubits using a superconducting quantum processor. By performing quantum state tomography on the output states, we benchmark our gate with input states spanning the entire Bloch sphere. We decompose the output-state error into a set of independently characterized error contributions. We extrapolate our constant-depth circuit to offer a scaling advantage compared to the unitary fan-out sequence beyond 25 output qubits with feedforward control, or beyond 17 output qubits if the classical feedforward latency is negligible. Our work highlights the potential of midcircuit measurements combined with real-time conditional operations to improve the efficiency of complex quantum algorithms.
- 28 August 2025
- Published by American Physical Society (APS) in Physical Review Applied
- Vol. 24 (2)
Open AccessConstant-depth fan-out with real-time feedforward on a superconducting quantum processor
When using unitary gate sequences, the growth in depth of many quantum circuits with output size poses significant obstacles to practical quantum computation. The quantum fan-out operation, which reduces the circuit depth of quantum algorithms such as the quantum Fourier transform and Shor’s algorithm, is an example that can be realized in constant depth independent of the output size. Here, we demonstrate a quantum fan-out gate with real-time feedforward on up to four output qubits using a superconducting quantum processor. By performing quantum state tomography on the output states, we benchmark our gate with input states spanning the entire Bloch sphere. We decompose the output-state error into a set of independently characterized error contributions. We extrapolate our constant-depth circuit to offer a scaling advantage compared to the unitary fan-out sequence beyond 25 output qubits with feedforward control, or beyond 17 output qubits if the classical feedforward latency is negligible. Our work highlights the potential of midcircuit measurements combined with real-time conditional operations to improve the efficiency of complex quantum algorithms.
- Open Access
Resource-Efficient Cross-Platform Verification with Modular Superconducting Devices
Large-scale quantum computers are expected to benefit from modular architectures. Validating the capabilities of modular devices requires benchmarking strategies that assess performance within and between modules. In this work, we evaluate cross-platform verification protocols, which are critical for quantifying how accurately different modules prepare the same quantum state -- a key requirement for modular scalability and system-wide consistency. We demonstrate these algorithms using a six-qubit flip-chip superconducting quantum device consisting of two three-qubit modules on a single carrier chip, with connectivity for intra- and inter-module entanglement. We examine how the resource requirements of protocols relying solely on classical communication between modules scale exponentially with qubit number, and demonstrate that introducing an inter-module two-qubit gate enables sub-exponential scaling in cross-platform verification. This approach reduces the number of repetitions required by a factor of four for three-qubit states, with greater reductions projected for larger and higher-fidelity devices.
Open AccessResource-Efficient Cross-Platform Verification with Modular Superconducting Devices
Large-scale quantum computers are expected to benefit from modular architectures. Validating the capabilities of modular devices requires benchmarking strategies that assess performance within and between modules. In this work, we evaluate cross-platform verification protocols, which are critical for quantifying how accurately different modules prepare the same quantum state -- a key requirement for modular scalability and system-wide consistency. We demonstrate these algorithms using a six-qubit flip-chip superconducting quantum device consisting of two three-qubit modules on a single carrier chip, with connectivity for intra- and inter-module entanglement. We examine how the resource requirements of protocols relying solely on classical communication between modules scale exponentially with qubit number, and demonstrate that introducing an inter-module two-qubit gate enables sub-exponential scaling in cross-platform verification. This approach reduces the number of repetitions required by a factor of four for three-qubit states, with greater reductions projected for larger and higher-fidelity devices.
- 15 July 2025
- Published by American Physical Society (APS) in Physical Review Letters
- Vol. 135 (3) , 030801
Complete Self-Testing of a System of Remote Superconducting Qubits
Self-testing protocols enable the certification of quantum systems in a device-independent manner, i.e., without knowledge of the inner workings of the quantum devices under test. Here, we demonstrate this high standard for characterization routines with superconducting circuits, a prime platform for building large-scale quantum computing systems. We first develop the missing theory allowing for the self-testing of Pauli measurements. We then self-test Bell pair generation and measurements at the same time, performing a complete self-test in a system composed of two entangled superconducting circuits operated at a separation of 30 m. In an experiment based on 17 million trials, we measure an average CHSH (Clauser-Horne-Shimony-Holt) S value of 2.236. Without relying on additional assumptions on the experimental setup, we certify an average Bell state fidelity of at least 58.9% and an average measurement fidelity of at least 89.5% in a device-independent manner, both with 99% confidence. This enables applications in the field of distributed quantum computing and communication with superconducting circuits, such as delegated quantum computing.
- 15 July 2025
- Published by American Physical Society (APS) in Physical Review Letters
- Vol. 135 (3) , 030801
Complete Self-Testing of a System of Remote Superconducting Qubits
Self-testing protocols enable the certification of quantum systems in a device-independent manner, i.e., without knowledge of the inner workings of the quantum devices under test. Here, we demonstrate this high standard for characterization routines with superconducting circuits, a prime platform for building large-scale quantum computing systems. We first develop the missing theory allowing for the self-testing of Pauli measurements. We then self-test Bell pair generation and measurements at the same time, performing a complete self-test in a system composed of two entangled superconducting circuits operated at a separation of 30 m. In an experiment based on 17 million trials, we measure an average CHSH (Clauser-Horne-Shimony-Holt) S value of 2.236. Without relying on additional assumptions on the experimental setup, we certify an average Bell state fidelity of at least 58.9% and an average measurement fidelity of at least 89.5% in a device-independent manner, both with 99% confidence. This enables applications in the field of distributed quantum computing and communication with superconducting circuits, such as delegated quantum computing.