Hua Wang

Radio-Frequency Integrated Circuits (RFICs) are foundational to modern wireless and wireline communication and sensing applications, including high-speed wireless 5G and 6G networks, satellite links, wireline interconnects for chip-to-chip and processor-to-memory signaling, and various radar and imaging systems. Distinct from analog or digital circuit design, RF circuits require the joint design and optimization of three-dimensional (3D) electromagnetic (EM) structures as passive components (governed by Maxwell’s equations) and nonlinear transistors as active gain components (determined by device physics). With this multiphysics nature, traditional RFIC design flows are human-centric and rely heavily on expert intuition and extensive iterative EM simulations, which often lead to long design cycles and restricted design spaces. Recently, inspired by progress in the photonics, antenna, microwave modeling, and electronic design automation (EDA) communities, artificial intelligence (AI) and machine learning (ML) have gained increasing traction as data-driven tools for augmenting RF circuit design. The goal is to convert EM-and circuit-level data into reusable models, fast evaluators, and inverse-design engines that can accelerate end-to-end RF circuit synthesis from performance specifications (specs) to layouts and/or explore new RF circuits with non-intuitive, non-conventional passive EM components. In this view, data-driven RFIC automation depends not only on model architectures, but also on how EM- and circuit-simulation labels are generated, reused, and verified in downstream design flows. This paper seeks to review this fast-growing technology direction. The paper starts by reviewing AI-assisted surrogate modeling for RFIC EM passives, including surrogates based on tabular, image, and graph representations of on-chip EM passives, together with neural operators that can improve surrogate learning capability. As a unique contribution of this paper, reported data-generation costs, computational resources, and model fidelity are also summarized to clarify practical deployment considerations. We further emphasize sample informativeness, output dimensionality, model reuse, and EM/circuit verification as factors that govern whether a surrogate model can be deployed in an RFIC design loop. Then, we review AI-assisted inverse design methods, including direct end-to-end synthesis, optimization-based inverse design with fast surrogates, and emerging generative-model-assisted approaches. Following that, we summarize representative AI-assisted RFIC silicon demonstrations across mm-Wave and sub-THz bands. Finally, we discuss open challenges and future directions toward reliable data-driven specs-to-layout automation, including data cost, model reuse, verification, and portability, and highlight opportunities for full-loop active-passive co-design and RFIC design automation.

This work presents a CMOS-only [micro-electromechanical systems (MEMS)-free] electronic nose (e-nose) for concurrent multi-gas-sensing applications. The proposed system integrates 4096 capacitance-to-digital converter (CDC) pixels, each implementing a compact bandpass sigma–delta ( $\Sigma \Delta $ ) ADC with a single feedback coefficient and no additional feedforward or feedback paths, achieving each pixel footprint of only $45\times 45~\mu $ m. The e-nose can achieve full baseline recovery and sensor reusability through an in-pixel heater to enable rapid and complete desorption of gas molecules from the sensing surface. The chip also includes 128 temperature-sensing pixels for on-chip thermal monitoring, utilizing a bandgap-based temperature sensor followed by a hybrid active–passive $\Sigma \Delta $ ADC, maintaining the same compact pixel footprint as the CDC pixels. The system operates from a 1.1-V supply with a power consumption of $10.3~\mu $ W per pixel at a 1-MHz sampling rate. To achieve high molecular selectivity, metal–organic framework (MOF) materials are utilized as the sensing interface. Two MOFs: CoNi–Pyz and HKUST-1 are employed for selective detection of ammonia (NH₃) and isopropyl alcohol (IPA), respectively, on the same chip. For NH₃ sensing, the proposed e-nose achieves a limit of detection (LoD) of 5 ppm, a sensitivity of 0.012 ( $\Delta $ C/C)/ppm, and a wide sensing range from 5 to 1000ppm. To the best of authors’ knowledge, this work achieves the highest reported density for a CMOS solid-state e-nose and represents the first demonstration of integrating both single and multiple MOF transducer materials directly on a CMOS chip. It also establishes a thermodynamically modulated sensing approach enabled by the in-pixel heater, ensuring full sensor reset and reusability.

Understanding complex physiological processes requires the ability to monitor multiple biological modalities concurrently, as electrical, ionic, and biochemical processes are tightly coupled and cannot be holistically described by single-mode sensors. This article presents a 40 nm CMOS multimodal cellular physiology monitoring platform that integrates 40 960 reconfigurable pixels at $10.8~\mu $ m pixel pitch. Each pixel supports electrophysiology recording, electrochemical sensing, ion-selective potentiometry, shadow imaging, and impedance spectroscopy, together with programmable voltage or current stimulation. Up to 10 240 pixels are recorded concurrently for extracellular potentials without direct pixel multiplexing, enabling a 23.6% effective sensing area and 25% peak simultaneous readout over a $1.4\times 3.5$ mm² active field of view. For impedance sensing, a mixer-embedded delta–sigma modulator (ME-DSM) performs direct digitization, improving robustness to electrode offset and harmonic interference. The platform is validated with potassium-selective ion measurements, cyclic voltammetry of catecholamine-related neurotransmitters, and in vivo zebrafish cardiac potential recording, illustrating applicability from single cells to live small-animal models on-chip. We report a comprehensive and multimodal physiology-monitoring system.

In this paper, we present a new transmitter that consists of multibeam generating optical phased array (OPA) and a monolithically integrated electro-optic (EO) modulator, achieving compact system area and high energy efficiency, for optical wireless communication (OWC). A concept of using both path length difference between the routing waveguides in the OPA and wavelength-division multiplexing is demonstrated to simultaneously create multiple beams in free-space and transmit data to receivers at different location, with a small device footprint. To further reduce the power consumption and area of the transmitter, the EO modulator and CMOS driver are co-designed and integrated in a single chip, using 45-nm monolithic silicon photonics technology. The EO modulator leverages an optical digital-to-analog converter structure, supporting both two-level and four-level pulsed amplitude modulations. The chip size of the 101-element OPA is 180 mm², and an active area of the co-integrated modulator and CMOS driver is 3.4 mm². The combined OPA and modulator system achieves maximum data rate and power consumption per beam/channel of 54 Gbps and 7.11 pJ/bit, respectively.