Martin Ordonez

Interleaved CLLC converters offer high power density and improved thermal performance, but achieving balanced currents between cells remains challenging in the presence of component mismatches. This paper introduces the first application of Dual-Phase Shift Modulation (DPSM) and Triple-Phase Shift Modulation (TPSM) to dual-phase interleaved CLLC converters. The goal is to achieve effective current balancing, high efficiency, and Zero-Voltage Switching (ZVS) across a wide load range. Analytical expressions for resonant currents are derived using harmonic approximation techniques, considering the influence of phase-shift parameters and passive component mismatches. A condition is introduced to prevent reverse power flow in either power cell, and ZVS boundaries are identified for all switches. An optimization framework is proposed for selecting phase-shift values that satisfy ZVS, positive power transfer, and minimum RMS current simultaneously. Experimental results from a 2 kW interleaved CLLC prototype validate the theoretical findings, demonstrating the superior performance of TPSM over DPSM in terms of current balancing, circulating current reduction, and efficiency, particularly under mismatch conditions.

Gate driving circuits are a crucial part of the safety, compliance, and performance of switched-mode power converters. Traditionally, these circuits use a single pulse and employ a gate resistor to control silicon (Si) MOSFETs. Unfortunately, the performance of this approach is limited by parasitic inductances, which can cause excessive oscillations, voltage stress, and catastrophic false turn-ON failures. As a result, power conversion applications typically sacrifice performance with respect to increased transient times and switching losses to maintain safe operation. This work proposes a simple multi-pulse (MP) driving sequence that enables reduced transient times and switching losses while keeping oscillations and voltage stress low. With this, the performance can be increased while upholding safety margins of the switched-mode power converter. The concepts and derived equations are verified by circuit simulations and experiments showcasing up to 25% loss reduction in the driver-stage, up to. 2% efficiency improvement in the power-stage, and up to 18X oscillation amplitude reduction compared to the conventional approach. Moreover, the proposed sequence and driving circuit achieve reliable operation in extreme slew-rate conditions beyond the capabilities of the traditional approach, resulting in voltage stress reduction and false turn-ON failure mitigation.

Cascaded multilevel power factor correction (PFC) converters show great potential for applications that require high ac voltage input but low dc-bus voltage output, such as telecom power supply, battery formation, and Internet data centers. They are compact and put less voltage stress on power switches. To provide multidc outports with fewer power switches, a cascaded half-bridge-based multilevel multiport bridgeless PFC is proposed in this article. Compared with cascaded full-bridge multilevel PFC, the number of switches per power cell for the proposed PFC is reduced by half while maintaining the same dc outports. Due to the multilevel voltage, the volt–second on the boost inductor decreases, reducing the current ripple of the proposed PFC by $2n$ times with the same boost inductance as the conventional totem-pole PFC. By splitting the power into $2n$ cells with low voltage, the total switching losses are also reduced by $2n$ times with the same equivalent switching frequency. In addition, the proposed rectifier also reduces conduction losses as lower voltage switches with smaller conduction loss are adopted in half-bridge cells compared with conventional totem-pole PFC rectifiers. Finally, these benefits are analyzed and validated with experiments.

Unprecedented expansion of renewable, energy storage, and fast charger system applications has diversified the bidirectional converter designs over the past decade. This article presents a new dual-active bridge (DAB) converter topology, which employs parallel and series switches arrangements for low-voltage bridge configurations. The additional switch inclusion provides high dc conversion gain, which enables attractive fast charger applications. The performance of the proposed DAB-based converter with wide dc range has been investigated through several design techniques and comparisons. The use of use of silicon carbide (SiC) devices in higher power conversion significantly improves switching losses. However, unsupervised design will result in significant switching losses and increased electromagnetic emissions. Since the DAB-based converter's high switching frequency allows operation with smaller magnetics, the system stray capacitance plays a critical role. The common-mode current propagated through the system's stray capacitance generates undesired electromagnetic interferences (EMI) and impacts the soft-switching achievable range. To overcome the common-mode current circulation issue, design solutions have been employed to reduce the emergence of system stray capacitance. A harmonic analysis is further discussed along with evaluation of transformer design comparisons. The experimental results show the performance of the DAB-based converter in bidirectional operation and improved common mode current generation with respect to EMI emissions. The simulation and experimental results have been performed using a 5 kW rated power DAB-based converter with SiC power semiconductors.

CLLC resonant converters are an attractive option for battery charging applications due to their bidirectional power flow and high efficiency. Pulse frequency modulation (PFM) is the simple method to drive CLLC converters. However, PFM cannot regulate the output voltage under the light-load condition properly, which leads to high switching and core losses. Phase-shift modulation techniques, such as dual-phase-shift (DPS) modulation, can overcome this challenge. However, more improvements are demanded due to high circulating currents in phase-shift modulations. In this article, an improved modulation technique based on triple phase shift (TPS) has been applied in CLLC converters to improve the light-load efficiency. TPS modulation like any other phase-shift modulation keeps the switching frequency of CLLC converters fixed at the resonant frequency under the light-load condition and regulates the output voltage by its three phase-shift parameters. The improved TPS modulation has lower circulating current at the same average output current compared to DPS modulation. Therefore, higher efficiency, smaller peak, and RMS current values can be achieved under the light-load condition. In addition, the proposed TPS modulation has a better flexibility in regulating the output voltage under the light-load condition due to an extra phase-shift parameter compared to DPS modulation. The proposed TPS modulation has been analyzed thoroughly in this article, and a proper selection of phase-shift values has been explained to improve the efficiency of the converter. Finally, advantages of the improved TPS modulation have been validated by simulation and a 1-kW experimental setup.

Since microgrids with renewable generation and energy storage can achieve high reliability, they present an attractive solution for powering critical loads. Microgrids should be carefully planned and optimized to meet the power requirements of critical loads and justify their economic viability. Conventional microgrid design approaches consider a fixed power architecture, focusing mainly on improving the financial aspects of the design by sizing its energy sources. This paper introduces a new Vectorial Microgrid Optimization (VMO) design method for critical loads. The proposed VMO improves the microgrid design by 1) incorporating the selection of the microgrid power conversion architecture and the size of the energy sources into a unified design strategy, 2) implementing multi-objective optimization to find the desired balance between the microgrid power supply availability, net present cost, and power efficiency. Through the use of graph theory, the proposed VMO automates the architecture selection process. The benefits of the proposed VMO method are highlighted in a critical load case-study to find the optimal microgrid design. The obtained microgrid design is compared with the results of existing microgrid planning tools and the standard industry approach for powering critical loads.

Integrating Distributed Generators (DGs) in DC microgrids require islanding detection in all converters. Impedance-based islanding detection methods can be beneficial in single-converter scenarios. However, their implementation in multi-converter systems is challenging due to interference among DGs. This paper proposes a Leader/Follower strategy for each active participant of the DC microgrid to independently detect the grid connection state. While the Leader injects a small AC pilot signal to estimate the impedance at its terminals, the Followers implement the proposed pilot signal cancellation (PSC) to present a virtual disconnection from the bus at $\omega _{p}$ . This leads to two core benefits: the Leader does not receive interference from the input impedance of the followers yielding accurate islanding detection for the Leader, and the followers can detect the islanding condition independently, with no need to increase the PSC amplitude. The proposed method provides independent and simultaneous islanding detection for all active participants in the DC microgrid. At the same time, it is scalable by the number of parallel-converters, not requiring any communication. Finally, the method has a minimal effect on the bus voltage.

Modern architectures of transformerless, three-phase-grid-connected photovoltaic (PV) inverter for 1000- and 1500-V commercial/residential applications are analyzed and compared from the point of view of the energy harvested during one year period, system efficiency, and power density. Scenarios for different ac grid voltage levels and inverters topologies are analyzed based on one- and two-stage solutions. The architectures with and without included dc/dc stage are compared from the point of view of the optimized power density. In the case of the two-stage PV inverter architecture, the mini-boost converter concept, presented in previous publications, is extended and the standard boost topology that employs 1200-V rated IGBTs and diodes is replaced by a multilevel, hybrid power converter topology that exhibits high efficiency due to the partial power processing and new classes of 900- and 650-V SiC and GaN devices employed. The inverter’s output filter design space (DS) has been researched from the point of view of the dc bus voltage variation. The cases are analyzed for fully controlled bus voltage at its minimum value and when allowed to vary in the full MPP range. Optimization results of the output filter DSs for the minimum and maximum operating dc bus voltage are compared in terms of the occupied volume in order to investigate whether it is possible to obtain more compact inverter stage by better control of dc bus voltage. The results show that in the case of controlled low dc bus voltage level, it is feasible to design a filter that occupies up to 50% less volume than the filter designed for the full MPP voltage variation. Even more, this can be achieved by maintaining the system efficiency. The simulation and experimental results complement the analysis of the 1000- and 1500-V grid-connected PV inverter systems.

Synchronous rectification (SR) technologies for $LLC$ resonant converters are essential to high-power, low-voltage battery chargers considering the excessive current stress on the rectifiers. Mainstream SR controllers employ an adaptive approach that measures the drain–source voltage during the SR turn-on phase ( $v_{\text {ds.on}}$ ). However, $v_{\text {ds.on}}$ is low-magnitude and sensitive to the voltage across parasitic inductors and capacitors. The distortion of $v_{\text {ds.on}}$ causes SR mistriggering, undermining the efficiency. This article proposes a noise-tolerant SR strategy based on the volt-second product (VSP) of SR drain–source voltage in the turn-off phase and rectifier current conduction time. The proposed method determines SR ON-time using high-magnitude voltage signals, which are tolerant of parasitic effects. In steady-state operation, the VSP method reduces the SR ON-time error caused by circuit parasitic components, whereas in transient operation, the algorithm dynamically adjusts SR ON-time to maintain a safe operation margin, preventing rectifier reverse current flow. Details of the implementation and timing sequence are provided to demonstrate the simplicity and effectiveness of the VSP SR algorithm. Experimental results show that compared with conventional adaptive SR, the proposed VSP SR decreases the ON-time error by 64% in the above-resonance operation and removes the reverse current in the below-resonance operation, which reduces the total loss by 3%.

Unregulated CLLC converters have significant potential for dc transformers and two-stage battery chargers due to their high efficiency and bidirectional capability. In these applications, unregulated CLLC converters are usually designed to have their switching frequency fixed at resonance for maximum efficiency. However, the resonant frequency drifts from the designed value due to resonant tank parameter deviations, which leads to a decrease in efficiency for unregulated converters. To address this issue, this article proposes the bidirectional resonant frequency and a unified tracking algorithm. By analyzing the generalized resonant frequency equations in depth, an interesting feature is discovered for CLLC converters: forward mode and backward mode achieve maximum efficiency at an identical (but not constant) frequency. Thus, this unique frequency is defined as bidirectional resonant frequency (BRF). As the BRF varies with parameter deviations, a unified bidirectional tracking algorithm is proposed, which unifies the tracking of bidirectional maximum efficiency points into the tracking of a BRF. The introduction of the BRF combined with the unified tracking algorithm provides a simple, accurate, and low-cost solution for bidirectional resonance tracking of unregulated CLLC converters. Finally, experimental results show that unified bidirectional tracking and efficiency improvement are achieved under parameter deviations.