Dharmavarapu Sreenivasarao

Among the various reduced switch count multilevel inverter (RSC-MLI) topologies, T-type is the most simplified configuration with appreciable reduction in switch count and thus becomes an alternate to the conventional cascade H-bridge (CHB) topology. However, the extreme reduction in switch count of T-type topology has limited its switching redundancies and causes a critical dc-link voltage balancing issues in closed-loop applications. In addition, the conventional multi-reference PWM scheme reported for T-type configuration produces poor line-voltage total harmonic distortion (THD). Therefore, in this paper, a five-level T-type topology with reduced dc sources is presented, which involves 1/3^rd of dc source requirement compared to the conventional T-type and CHB. This will greatly reduce the dc-link voltage balancing issues and cost. Further, a simple carrier based modulation scheme is proposed to improve its line-voltage THD as compared to the conventional multi-reference PWM scheme. The open-loop performance of five-level T-type configuration is analysed in MATLAB/Simulink and experimental environments with the proposed modulation scheme. Further, to evaluate the effectiveness and dynamic performance of the developed T-type configuration, a distributed static compensator (DSTATCOM) application is considered to eliminate source current harmonics, reactive power and load unbalance in three-phase four-wire (3P4W) distribution system. The results are presented in MATLAB/Simulink environment and further a cost comparison is made with conventional T-type and CHB.

An efficient and cost-effective power converter is a pre-requisite for the modern power applications. With the evolvement of matured medium power self-commutated switching devices, multilevel inverters (MLIs) are emerged as a promising solution for high-power medium-voltage applications. Though, MLIs are performing a promising role in industrial applications, their high device count, size, cost and control complexity have restricted their market penetration. To address the disadvantages of MLIs, researchers are continuously contributing to new generation topologies under the name of reduced switch count (RSC) MLIs. From the past decade, numerous RSC-MLIs topologies have been reported for various applications. Therefore, this paper presents a comprehensive review and classification of RSC-MLI topologies, in terms of their structure, features, limitations, suitability and selection for specific applications.

The reduced switch count multilevel inverter (RSC‐MLI) is the latest trend in power electronic converters due to reduction in the switch count and cost. However, a large number of RSC‐MLIs have not yet reached to the application level because of the absence of modularity, unequal load‐sharing among DC sources and the absence of switching redundancies. On the other hand, multilevel dc‐link (MLDCL) and switched series parallel sources (SSPS) RSC‐MLI topologies are modular structures with adequate switching redundancies and can be an alternative to conventional cascaded H‐bridge (CHB) for grid‐connected photovoltaic (PV) systems. Therefore, in this paper, a comprehensive comparison among CHB, MLDCL and SSPS topologies has been carried out for grid connected PV application. Based on the outcome, an asymmetric 11 kV three‐phase 11‐level SSPS RSC‐MLI is chosen. In this combination, a common non‐linear sliding mode controller (SMC) is developed for generating maximum PV power from asymmetric single‐stage PV sources by linearizing the non‐linear PV system using an effective feedback linearization scheme. The PV power extracted is delivered to the grid by controlling SSPS RSC‐MLI using another SMC. The performance of the system under wide variations of insolation levels is verified in MATLAB and further validated in hardware‐in‐the‐loop OPAL‐RT controller.

This paper presents the grid integration of reduced switch count (RSC)‐based asymmetric Multilevel DC‐Link (MLDCL) inverter for photovoltaic (PV) system. Among the recently reported reduced switch count multilevel inverter (RSC‐MLI) topologies, MLDCL possess modularity, switching redundancies and fault tolerant capability. MLDCL can achieve multilevel output with significant reduction in switch count as compared to cascade H‐bridge (CHB). Similar to CHB, the structure of MLDCL allows to develop a common control strategy to obtain maximum powers from equal rated PV sources so that control complexity can be reduced. In this connection, a robust nonlinear sliding mode control (SMC) is designed for MLDCL‐based PV system to extract maximum power from each PV source. For this, a three‐phase asymmetrical eleven‐level MLDCL inverter with PV sources in 2:2:1 voltage ratio is considered. Therefore, two SMCs are developed to extract maximum power from each group of equal rating PV sources. The performance of SMC under variable irradiance conditions is verified against PI controller, and the results are analyzed in MATLAB and hardware‐in‐loop OPAL‐RT test beds.

In this article, a single-phase Distribution Static Compensator (DSTATCOM) with reduced dc-link voltage is proposed for power quality improvement in a distribution system. Generally, the dc-link voltage of DSTATCOM is maintained twice the peak of Point of Common Coupling (PCC) voltage by voltage regulation loop. But, the dc-link voltage is maintained itself without voltage regulation loop in the proposed method. For this case, the required dc-link voltage magnitude is less when compared to conventional method. Under predefined load conditions such as agriculture pump set loads, this less voltage is sufficient to give satisfactory performance. Therefore, the rating of DSTATCOM is reduced and thereby the cost of system is reduced. The proposed method enables compensation of reactive power and mitigation of source current harmonics in a distribution system for low power applications. The advantages of the proposed method are elimination of dc voltage sensing elements, minimization of switching loss of Voltage Source Inverter (VSI) and cost effective. The proposed single-phase DSTATCOM performance is demonstrated through MATLAB/simulink and validated by experimental results with agriculture pump set load.

The prominence of reduced switch count multilevel inverters is rising owing their merits of decreased number of switches and modular structures. There are topologies that use more than one source; however, utilization of all the sources at all levels is seldom. These topologies will diminish the energy efficiency of the conversion system as all the sources will not deliver the power except at the highest level in the output voltage. These kinds of converters can hamper the penetration of renewable energy into the existing energy mix, as the energy capacity of the renewable source is undermined. In this connection, this paper explores a three-phase multilevel inverter that can extract the power from all the sources at all the levels through series/parallel switchings. Besides, this paper develops a sliding mode based nonlinear controller for closed-loop operation of the multilevel inverter, which is not addressed sufficiently in the literature. The performance of the developed variable gain nonlinear controller is validated against the PI controller for delivering desired powers under different operating conditions/disturbances using simulations and in real-time environment.

Neutral shifting (NS) is a popular scheme to achieve fault tolerance operation (FTO) of multilevel inverters (MLIs) such as cascaded H‐bridge (CHB). This fault tolerance scheme (FTS) can be realised with/without zero‐sequence voltage injection. Among these, NS with zero‐sequence injection FTS is relatively easier to implement. However, this scheme is not generalised for multiple open‐circuit faults. Moreover, NS‐FTS schemes are not directly applicable for fault tolerance of reduced switch count (RSC)‐MLIs, as these inverters have limited redundancies. Therefore in this study, FTO for RSC‐based multilevel dc‐link (MLDCL) inverter using NS zero‐sequence injection FTS is proposed for simultaneous failure of multiple switch faults. Generalised mathematical equations are derived to calculate the magnitude and phase angle of injected zero‐sequence voltage for obtaining balanced line voltages with uniform power sharing among all healthy units. The proposed generalised NS‐FTS with zero‐sequence injection is implemented on three‐phase 15‐level MLDCL inverter for various fault conditions. The obtained simulation results are validated experimentally on nine‐level MLDCL inverter.