Ganjikunta Siva Kumar

This paper presents the implementation of a grid-tied, back-to-back, three-leg voltage source inverter (BTB-TLVSI) supported by a solar photovoltaic array (SPVA) for reducing common mode voltage (CMV), adaptive DC-link voltage regulation, and compensating both reactive and non-reactive power. High CMV in grid-tied VSIs can cause large leakage currents, increased switching losses, harmonic distortion, and electromagnetic interference. To reduce CMV, special VSI topologies, passive filters, and various control algorithms are used in the literature; however, these often increase both cost and complexity. Model predictive control (MPC) is one of these methods, which includes the CMV as one of the constraint with a weighting factor to effectively reduce CMV in the BTB-TLVSI and also reduce cost and complexity. To simplify the tuning of the weighting factor, the VlseKriterijumska Optimizacija I Kompromisno Resenje (VIKOR) technique is employed in the BTB-TLVSI. Furthermore, adaptive DC-link voltage regulation has been implemented based on the power injection by BTB-TLVSI, resulting in lower switching losses and voltage stress across switches. Finally, the performance of the proposed method is validated through both simulation and experimental studies, demonstrating its effectiveness in comparison to existing methods.

The article presents a multi‐constraint model predictive control (MPC) strategy for a four‐switch split‐capacitor distribution static compensator (FSSC‐DSTATCOM) to achieve capacitor voltage balancing and reduced switching losses. The conventional DSTATCOM face challenges in maintaining capacitor voltage balance under high dc component of currents, leading to unbalanced source currents, higher harmonics, and increased reactive power demand. To address these issues efficiently in four‐wire systems, the FSSC‐DSTATCOM is employed, which offers a cost‐effective solution with reduced number of switches compared to three‐leg and four‐leg topologies. A chopper circuit integrated with the FSSC‐DSTATCOM is controlled using a multi‐constraint MPC that includes a switching frequency cost function to predict system states and select optimal switching sequences. This approach minimizes switching frequency and switching losses. To simplify the tuning of multiple cost function weights, the vIseKriterijumska optimizacija i kompromisno resenje (VIKOR) method ensures an optimal balance among control objectives. The control algorithm, based on instantaneous symmetrical component theory (ISCT), generates switching signals for both the chopper and FSSC‐DSTATCOM. The proposed system enhances current tracking, improves source current balance, and provides effective reactive power compensation. The simulation in MATLAB/Simulink and experimental results validate the effective performance of the proposed method.

This paper discusses leg-by-leg-based model predictive control (MPC) for a four-leg distribution static compensator (FL-DSTATCOM), to address current-related power quality issues. In conventional MPC, increasing the number of phases significantly raises computational complexity, as the number of switching states grows exponentially. The proposed method applies MPC independently to each leg, reducing complexity while improving steady-state performance. An LC filter is incorporated to reduce switching stress and DC-link voltage requirements, resulting in a reduction of DC-link voltage from 1,000 V to 700 V. The switching frequency is included in the cost function, and the Technique for Order Preference by Similarity to Ideal Solution (TOPSIS) is employed to simplify the selection of weighting factors. As a result, the switching frequency is decreased to 14 kHz while maintaining the total harmonic distortion (THD) at 3.4 %. The effectiveness and improved performance of the proposed control strategy are validated through both simulation and experimental investigations.

A three‐phase four‐switch split capacitor distribution static compensator (FSSC‐DSTATCOM) with a zig‐zag transformer is used to mitigate current‐related power quality issues in the distribution system. In conventional DSTATCOM, a significant dc component of current diverges voltages across split capacitors, degrading the current tracking performance and increasing the source current THD. The proposed FSSC‐DSTATCOM with chopper circuit equalizes the voltages across split capacitors, improves the current tracking performance, and reduces the source current THD. Moreover, FSSC‐DSTATCOM reduces the switch count compared to conventional approaches that use more switches. In FSSC‐DSTATCOM, switching pulses for each switch are generated using hysteresis current control based on the reference filter currents derived from instantaneous symmetrical component theory (ISCT). The generation of switching pulses of chopper circuit is achieved by employing logical relational operator circuitry at the dc input side of DSTATCOM. Simulation and hardware implementation are used to verify the proposed FSSC‐DSTATCOM with the chopper circuit.

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In this paper, a three-leg split capacitor distribution static compensator (TLSC-DSTATCOM) with chopper circuit is used to mitigate current related power quality issues in the distribution system. In conventional TLSC-DSTATCOM, the split capacitor voltages are unbalanced and switching frequency is high under DC load conditions, which leads to increases in source current THD and switching losses. In order to balance the split capacitor voltages during DC load conditions, a TLSC-DSTATCOM with chopper circuit is used in the proposed method. TLSC-DSTATCOM is controlled using model predictive control (MPC) to increase the steady state response, and control of the chopper circuit is based on the predicted dc link voltage from the optimal switching state and the reference dc link voltage. High switching frequency is a limitation of MPC, considering switching frequency as a cost function with a weighting factor to minimizing switching frequency of voltage source inverter (VSI). When considering two or more cost functions in MPC, it will be difficult to select optimal weighting factors for the intended output. To minimize the complexity of the weighting factor tuning, VlseKriterijumska Optimizacija I Kompromisno Resenje (VIKOR) technique is used in TLSC-DSTATCOM. The proposed method is validated using simulation and experimental tests.

This article discusses, a photo-voltaic (PV) grid connected dual two-level voltage source inverter (GCDTL-VSI) to improve the power quality, reliability, and efficiency of the grid. In PVGCDTL-VSI, VSI-1 is employed to compensate the current related power quality concern, while VSI-2 is employed to transfer real power to the load and grid. In literature, the dc-link voltage maintains constant at the input terminal of VSI-1 under low power injection. As a result, there will be significant switching losses and stress on the inverter switches. In the proposed method, VSI-1 with LC-filter, and an adaptive dc link voltage control technique is used to alleviate the switching losses and stress on the inverter switches. Additionally, the two-leg VSI employs for supply real power to the load and grid instead of the conventional approach uses three-leg VSI. In PVGCDTL-VSI, a model predictive control (MPC) with multiconstraint technique is used to generate the switching pulses, dc-link capacitor voltage balancing, and reduce switching frequency. To reduce the weighting factor control complexity, Technique for Order Preference by Similarity to Ideal Solution (TOPSIS) approach is employed in PVGCDTL-VSI. To evaluate the effectiveness and performance of the PVGCDTL-VSI, are carried out simulation and experimental tests.

In this study, the common mode voltage (CMV) of photo-voltaic grid connected inverter (PVGCI) is reduced due to minimal switching constraints and lower PVGCI input dc voltage during low power injection. In the absence of a transformer at the grid side, a high frequency CMV in PVGCI can cause electromagnetic interference, magnetic saturation, and circulating currents among other things. In the literature on reducing CMV, various topologies, control algorithms, and filter components have been used. The design recommended in the paper uses a two-level four-leg inverter with fourteen switching states to reduce CMV. The grid current THD increases as the number of switching states evaluated decreases; however, the approach suggested minimizes grid current THD by decreasing the dc voltage during low-power flow from PVGCI, and the CMV amplitude is determined by PVGCI input dc voltage, which decreases during low-power injection. A cost function of average switching frequency is considered for decreasing the switching frequency of PVGCI. The suggested approach is simulated in MATLAB simulation and a hardware experiment is performed in hardware lab to demonstrate its superiority over existing models.