Serkan Dusmez

Presents corrections to the paper, Optimization and Design Considerations of GaN-Based Multi-Level TP PFC Converters.

The power factor correction (PFC) circuit is an essential component in high-power supplies with nonlinear loads, occupying nearly half the size of a typical power supply. To minimize the size of passive components in PFC converters, the switching frequency must be increased to several hundred kHz, a challenge even when employing gallium nitride (GaN) devices under hard-switching conditions. This article proposes a new GaN-based totem-pole (TP) PFC converter integrated with a bidirectional soft-switching cell. Unlike critical-conduction-mode TP PFC circuit, the proposed converter operates in continuous-conduction-mode with simple control. Design considerations and optimization of soft-switching cell are discussed and verified with simulations. As a proof of concept, a two-phase interleaved version of the proposed converter rated at 3700 W has been designed. The designed prototype achieves a peak efficiency of 99.14 $\%$ and surpasses the hard-switched GaN-based TP PFC converters in both power density and cost.

The passive components of LLC resonance converters are traditionally designed based on a resonance frequency and switching frequency range considering required voltage conversion rate while ensuring zero-voltage-switching of the primary side power devices. Afterwards, the sub-elements such as transformer, power stage, and heat-sink are locally designed. However, this may only lead to locally optimized designs. In this paper, a systematic design framework is proposed that attempts to determine the resonance frequency by considering non-linear battery load profile, power loss, volume and cost of all main components. To achieve smaller sized transformer, a series connected primary and parallel connected secondary windings with a multi-core configuration is also considered. The proposed algorithm aids designers to optimally size the LLC, and provides a step-by-step design methodology. An LLC stage of a light electric vehicle battery charger converting 370 V- 430 V to an output voltage range of 36 V- 54 V rated at 3700 W with a peak efficiency of 98.2% has been designed validating the proposed design procedure.

Latest developments in low voltage wide-bandgap semiconductor technology have increased the popularity of single-phase multi-level (ML) totem pole (TP) power-factor correction (PFC) converters. Phase shifted flying capacitor based power stages offer several advantages, such as higher input current ripple frequency, smaller size inductor and differential mode (DM) filter, and usage of low voltage Gallium Nitride (GaN) devices with better figure-of-merit. Even though it has been proven that ML TP PFC converters have good power density and efficiency, the determination of optimal voltage levels and switching frequency requires a system-level optimization. This paper proposes an optimization framework for ML TP PFC converters, taking the power stage, thermal, DM filter, and magnetic designs, as well as practical design considerations, into account to determine the voltage-levels and switching frequency that minimize the power losses, cost and volume of the total system. To process output power of 3700W, the optimization tool suggests using a 4-Level GaN TP PFC topology switched at 45 kHz. The outcome of the tool has been compared with other fixed inductor current ripple designs, as well as optimized designs for 3-Level and 5-Level TP PFC converters in terms of cost, volume, and power losses. In accordance with the optimization results, a prototype of a 4L TP PFC rated at 3700 W is designed, which achieves a peak efficiency of 99.6% at 1 kW and >99.1% efficiency under the full power range.

Wide band-gap power devices have enabled single-phase totem-pole (TP) power factor correction (PFC) converter designs to be switched at several tens of kHz under hard-switching and hundreds of kHz under soft-switching. It is straight-forward to analyze and compare the volume of boost inductor for TP PFC converters having multi-leg and multi-level configurations operating under continuous-conduction-mode (CCM) and critical-conduction-mode (CrM) at various switching frequencies; however, the impact of topology and switching frequency selections remains unchallenged for generated differential mode (DM) noise. This paper proposes a unified and generalized DM noise estimation method for multi-leg, and multi-level TP PFC converters operated under both CCM and CrM operation modes. The method has been verified with simulation results obtained from various TP PFC topologies, as well as experimental results obtained from single-leg CCM and 4-Level CCM TP PFC converters. The empirically determined boxed sizes of DM filters have been compared among various TP PFC topologies, and the best switching frequency for each topology has been determined with the integration of boost inductor volume comparison.

LLC rezonans dönüştürücü tasarımı, Lm, Lr, Cr ve kalite faktörünün gerilim kazancının karmaşık bir fonksiyonu olması ve uygulamaya bağlı olarak gerilim kazançlarını kapsayan Sıfır Gerilimde Anahtarlama’yı (SGA) sağlayabilecek anahtarlama frekansı aralığı seçiminin zorluğundan dolayı elektrikli araç şarj uygulamaları için hayli zorlu bir tasarım problemidir. Bu çalışma, hava aralıklı manyetik bileşenler için birden fazla tasarım bileşenini ve kısıtını bir arada değerlendirebilen, doğadan esinlenen matematiksel yöntem tabanlı yeni bir tasarım yöntemi sunmaktadır. Önerilen yeni yöntem Parçacık Sürüsü Algoritması ile, oluşturulan çekirdek veri tabanındaki birçok çekirdek arasından en uygun tasarımı seçmektedir. Geleneksel tasarım algoritmalarından farklı olarak önerilen algoritma, manyetik bileşenlerin kaybını, maliyetini ve hacmini içeren bir amaç fonksiyonunu en aza indirerek en uygun manyetik akı yoğunluğunu belirlemektedir. Sunulan yöntem hafif bir elektrikli araç şarj cihazındaki 3700W, 48V LLC rezonans dönüştürücü için denenmiştir. Algoritma içinde birincil ve ikincil sargılarda sırasıyla seri ve paralel çoklu bağlamaların uygulandığı çok çekirdekli yapılar dikkate alınarak bir tasarım çalışması yapılmıştır. Tasarlanan manyetik bileşenler Ansys Electronic Desktop ve Simplorer ortak benzetim ortamında doğrulanmış ve çekirdek veri tabanından en uygun çekirdek yapıları seçilmiştir. Önerilen yöntemin en uygun LLC rezonans dönüştürücü tasarımını bulmak için çoklu kombinasyonların bir arada ve hızla değerlendirilebileceği sistem düzeyinde bir optimizasyon algoritmasının bir parçası olarak kullanılabileceği görülmüştür.

LLC converter design optimization remains a challenging task for varying loads such as in battery chargers. There are numerous L-L-C combinations to choose from a design space that can satisfy the required voltage gains of the application. An accurate magnetic model is essential to optimally size the passive components according to the application needs. This paper provides a new design tool for gapped core magnetics to optimize the transformer and resonant inductor in LLC converters. Unlike conventional design algorithms, the proposed algorithm considers multiple distributed cores and selects the optimal magnetic flux density by minimizing a penalty function that includes power loss, cost and volume of the magnetic components using Big-Bang Big-Crunch Algorithm. The gapped core transformer and inductor design equations have been verified in Ansys Maxwell and Simplorer co-simulation environment for a 3700W 48V LLC and calculated power loss have been compared with experimental results. For the given L _m and L _r pair of 37.52 μH and 9.38 μH, the proposed magnetic model designed a transformer with two-distributed cores, each one exhibiting a magnetizing inductance of 17.73 μH and leakage inductance of 0.7 μH on a EE422120 with 3F36 material. The total power loss of the transformers are measured as 12.44 W on a 3700 W prototype switched at 350 kHz.

GaN FET anahtarlar ufak paket boyutlarına sahip olması ve yüksek çalışma gerilim-akım değerlerini yüksek anahtarlama frekanslarında sağlayabilmesinden dolayı güç elektroniği çeviricilerinde yeni ufuklar açmıştır. Bu çalışma EPC firması tarafından üretilmiş olan küçük paket boyutlarındaki EPC2215 (VDS=200V, ID=32A, RDS(on)=8m) GaN FET anahtarların sonlu elemanlar yöntemi tabanlı ısıl modelinin elde edilmesini ile ilgilidir. JEDEC standartlarınca belirlenen deney talimatları kurulan benzetim modeline uygulanmıştır. Anahtarın jonksiyondan kılıfa, jonksiyondan dış ortama ve jonksiyondan devre kartına olan ısıl dirençleri benzetim modeli ile hesaplanmış ve firmanın veri föylerinde paylaştığı ısıl direnç değerleri ile karşılaştırılmıştır. Daha sonra yine aynı firmaya ait olan, EPC2215 anahtarları ile yapılan, EPC9099 yarım-köprü geliştirme kartının ısıl modellemesi yapılmıştır. Firma tarafından veri föyünde paylaşılan kayıp güç değerleri benzetim modeline uygulanmıştır. Benzetim sonucunda geliştirme kartının ısıl yönden zorlandığı bölgeler belirlenmiştir. Daha sonra benzetim ile elde edilen ısıl dağılım sonuçları ile deneysel termal kamera görüntüleri karşılaştırılmıştır.

Fault diagnosis and failure prognosis of power electronics systems are essential for various mission critical applications, where safety, continuity, and survivability of the system are of paramount importance. With the recent advances in power device failure precursor identification and lifetime estimation, it is possible to extend the lifetime of the power devices, and thereby converters through secondary control schemes. The essence of the lifetime extension strategies relies on either reducing the power loss on the degraded device(s) and shifting it to other parts, or decreasing the total power loss of the converter. As the power converters are optimized for efficiency and total harmonic distortion (THD) requirements, these secondary control strategies can result in operations above the design limits. This paper proposes a hybrid secondary lifetime extension control scheme for three-phase inverters based on the identified failure precursors, which dynamically changes the modulation scheme and adjusts the switching frequency. In the content of this paper, the tradeoff between the THD and achievable lifetime extension is addressed, and a control algorithm is proposed, which maximizes the lifetime with feasible lowest THD.

In this paper, a novel soft-switching secondary-side modulated dc-dc structure with extended zero voltage switching (ZVS) range is proposed. In a simple manner, this structure can be extended to provide isolated multioutputs with independent voltage regulation capability. Besides, the secondary side can be bidirectional to interface with energy storage elements such as batteries and ultracapacitors. The proposed topology is suitable for high voltage gain or high output dc-link voltage, low-power, and multioutput applications. The primary-side full-bridge switches operate complementarily to generate a two-level square wave. Therefore, the circulating energy is significantly smaller than conventional phase-modulated full-bridge converters. The output voltage is regulated by controlling the duty cycle of the auxiliary mosfet on the active/semiactive rectifier, which offers a simple control. Moreover, the ZVS operation range of full-bridge mosfets is enhanced due to the volt-second balance of magnetizing inductance and the secondary-side control. All the secondary-side rectifying diodes turn off with limited di/dt. A 1-kW prototype generating two 390 V, 330-400 V outputs from a 130-180 V dc link is designed to serve as a proof of concept. The full-load efficiency is 95.6% at 100 kHz switching frequency.