Chengyu Jiang

The effects of barrier layer thickness, Al component of barrier layer, and passivation layer thickness of high-resistance Si (111)-based AlGaN/GaN heterojunction epitaxy on the knee-point voltage (V_knee), saturation current density (I_d-sat), and cut-off frequency (f_t) of its high electron mobility transistor (HEMT) are simulated and analyzed. A novel optimization factor OPTIM is proposed by considering the various performance parameters of the device to reduce the V_knee and improve the I_d-sat on the premise of ensuring the f_t. Based on this factor, the optimized AlGaN/GaN epitaxial structure was designed with a barrier layer thickness of 20 nm, an Al component in the barrier layer of 25%, and a SiN passivation layer of 6 nm. By simulation, when the gate voltage V_g is 0 V, the designed device with a gate length of 0.15 μm, gate-source spacing of 0.5 μm, and gate-drain spacing of 1 μm presents a high I_d-sat of 750 mA/mm and a low V_knee of 2.0 V and presents f_t and maximum frequency (f_max) as high as 110 GHz and 220 GHz, respectively. The designed device was fabricated and tested to verify the simulation results. We demonstrated the optimization factor OPTIM can provide an effective design method for follow-up high-frequency and low-voltage applications of GaN devices.

Because of the high electron mobility and electron velocity in the channel, InAs/AlSb high electron mobility transistors (HEMTs) have excellent physical properties, compared with the other traditional III-V semiconductor components, such as ultra-high cut-off frequency, very low power consumption and good noise performance. In this paper, both the structure and working principle of InAs/AlSb HEMTs were studied, the energy band distribution of the InAs/AlSb heterojunction epitaxy was analyzed, and the generation mechanism and scattering mechanism of two-dimensional electron gas (2DEG) in InAs channel were demonstrated, based on the software simulation in detail. In order to discuss the impact of different epitaxial structures on the 2DEG and electron mobility in channel, four kinds of epitaxies with different thickness of InAs channel and AlSb upper-barrier were manufactured. The samples were evaluated with the contact Hall test. It is found the sample with a channel thickness of 15 nm and upper-barrier layer of 17 nm shows a best compromised sheet carrier concentration of 2.56 × 10¹² cm⁻² and electron mobility of 1.81 × 10⁴ cm²/V·s, and a low sheet resistivity of 135 Ω/□, which we considered to be the optimized thickness of channel layer and upper-barrier layer. This study is a reference to further design InAs/AlSb HEMT, by ensuring a good device performance.

High-k/n-InAlAs MOS capacitors are popular for the isolated gate of InAs/AlSb and InAlAs/InGaAs high-electron mobility transistors. In this study, a new kind of high-k/n-InAlAs MOS-capacitor with a HfO₂–Al₂O₃ laminated dielectric was successfully fabricated using an optimized process. Compared with the traditional HfO₂/n-InAlAs MOS capacitor, the new device has a larger equivalent oxide thickness. Two devices, with a HfO₂ (8 nm)–Al₂O₃ (4 nm) laminated dielectric and a HfO₂ (4 nm)–Al₂O₃ (8 nm) laminated dielectric, respectively, were studied in comparison to analyze the effect of the thickness ratios of HfO₂ and Al₂O₃ on the performance of the devices. It was found that the device with a HfO₂ (4 nm)–Al₂O₃ (8 nm) laminated dielectric showed a lower effective density of oxide charges, and an evidently higher conduction band offset, making its leakage current achieve a significantly low value below 10⁻⁷ A/cm² under a bias voltage from −3 to 2 V. It was demonstrated that the HfO₂–Al₂O₃ laminated dielectric with a HfO₂ thickness of 4 nm and an Al₂O₃ thickness of 8 nm improves the performance of the high-k dielectric on InAlAs, which is advantageous for further applications.