Sang-Hwan Kim
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Previous Organizations / Institutes
The organizations / institutes from the scholar's other articles in the past ten years
Research Subjects
Sang-Hwan Kim has a total of 38 co-authors. Here are the top co-authors by number of shared publications:
- Jang-Kyoo Shin
School of Electronics Engineering, Kyungpook National University, 80 Deahak-ro, Buk-gu, Daegu 41566, Korea
9 shared publications - Jimin Lee
School of Electronics Engineering, Kyungpook National University, 80 Deahak-ro, Buk-gu, Daegu 41566, Korea
8 shared publications - Byoung-Soo Choi
School of Electronics Engineering, Kyungpook National University, Daegu 41566, Korea
7 shared publications - JongHo Park
Center for Integrated Smart Sensors, KAIST, 291 Daehak-ro, Yuseong-gu, Daejeon 34141, Korea
4 shared publications - Sang-Jin Lee
Center for Integrated Smart Sensors, KAIST, 291 Daehak-ro, Yuseong-gu, Daejeon 34141, Korea
4 shared publications - Seunghyuk Chang
Center for Integrated Smart Sensors, KAIST, 291 Daehak-ro, Yuseong-gu, Daejeon 34141, Korea
4 shared publications
Latest Publications
- Open Access
- 20 October 2020
- Published by MYU K.K. in Sensors and Materials
- Vol. 32 (10) , 3261-3272
Pixel Dark Current Calibration Method to Reduce Dark Fixed Pattern Noise in Amorphous Silicon Bolometer-type Uncooled Infrared Image Sensor
- 20 October 2020
- Published by MYU K.K. in Sensors and Materials
- Vol. 32 (10) , 3261-3272
Open AccessPixel Dark Current Calibration Method to Reduce Dark Fixed Pattern Noise in Amorphous Silicon Bolometer-type Uncooled Infrared Image Sensor
- Open Access
CMOS Depth Image Sensor with Offset Pixel Aperture Using a Back-Side Illumination Structure for Improving Disparity
This paper presents a CMOS depth image sensor with offset pixel aperture (OPA) using a back-side illumination structure to improve disparity. The OPA method is an efficient way to obtain depth information with a single image sensor without additional external factors. Two types of apertures (i.e., left-OPA (LOPA) and right-OPA (ROPA)) are applied to pixels. The depth information is obtained from the disparity caused by the phase difference between the LOPA and ROPA images. In a CMOS depth image sensor with OPA, disparity is important information. Improving disparity is an easy way of improving the performance of the CMOS depth image sensor with OPA. Disparity is affected by pixel height. Therefore, this paper compared two CMOS depth image sensors with OPA using front-side illumination (FSI) and back-side illumination (BSI) structures. As FSI and BSI chips are fabricated via different processes, two similar chips were used for measurement by calculating the ratio of the OPA offset to pixel size. Both chips were evaluated for chief ray angle (CRA) and disparity in the same measurement environment. Experimental results were then compared and analyzed for the two CMOS depth image sensors with OPA.
Open AccessCMOS Depth Image Sensor with Offset Pixel Aperture Using a Back-Side Illumination Structure for Improving Disparity
This paper presents a CMOS depth image sensor with offset pixel aperture (OPA) using a back-side illumination structure to improve disparity. The OPA method is an efficient way to obtain depth information with a single image sensor without additional external factors. Two types of apertures (i.e., left-OPA (LOPA) and right-OPA (ROPA)) are applied to pixels. The depth information is obtained from the disparity caused by the phase difference between the LOPA and ROPA images. In a CMOS depth image sensor with OPA, disparity is important information. Improving disparity is an easy way of improving the performance of the CMOS depth image sensor with OPA. Disparity is affected by pixel height. Therefore, this paper compared two CMOS depth image sensors with OPA using front-side illumination (FSI) and back-side illumination (BSI) structures. As FSI and BSI chips are fabricated via different processes, two similar chips were used for measurement by calculating the ratio of the OPA offset to pixel size. Both chips were evaluated for chief ray angle (CRA) and disparity in the same measurement environment. Experimental results were then compared and analyzed for the two CMOS depth image sensors with OPA.
- 29 February 2020
- Published by The Korean Society for Aeronautical & Space Sciences in Journal of the Korean Society for Aeronautical & Space Sciences
- Vol. 48 (2) , 159-166
Multi-UAV Mission Allocation and Optimization Technique Based on Discrete-Event Modeling and Simulation
본 연구는 복잡한 다수 무인기 시스템을 효율적으로 운용하기 위해 이산 사건 모델 기반의 다수 무인기 이종 임무 할당 기법을 제안한다. 이종 임무의 생성, 임무 할당, 무인기 출동, 임무 수행, 무인기 수리 및 정비에 이르는 무인기의 임무 시작에서 종료까지 일련의 과정을 이산 사건 모델링을 통해 수학적으로 정의하고, 이를 기반으로 주어진 임무 상황에서 필요한 최적 무인기 대수를 도출한다. 도출된 최적 무인기 대수를 적용하여 이산 사건 모델 기반의 반복 시뮬레이션을 통해 그 결과를 검증한다. 제안된 이종 임무 할당 기법으로 운용자는 제한된 무인기 자원을 효율적으로 활용하여 주어진 임무 상황에서 최적의 임무 계획을 수립할 수 있다.
- 29 February 2020
- Published by The Korean Society for Aeronautical & Space Sciences in Journal of the Korean Society for Aeronautical & Space Sciences
- Vol. 48 (2) , 159-166
Multi-UAV Mission Allocation and Optimization Technique Based on Discrete-Event Modeling and Simulation
본 연구는 복잡한 다수 무인기 시스템을 효율적으로 운용하기 위해 이산 사건 모델 기반의 다수 무인기 이종 임무 할당 기법을 제안한다. 이종 임무의 생성, 임무 할당, 무인기 출동, 임무 수행, 무인기 수리 및 정비에 이르는 무인기의 임무 시작에서 종료까지 일련의 과정을 이산 사건 모델링을 통해 수학적으로 정의하고, 이를 기반으로 주어진 임무 상황에서 필요한 최적 무인기 대수를 도출한다. 도출된 최적 무인기 대수를 적용하여 이산 사건 모델 기반의 반복 시뮬레이션을 통해 그 결과를 검증한다. 제안된 이종 임무 할당 기법으로 운용자는 제한된 무인기 자원을 효율적으로 활용하여 주어진 임무 상황에서 최적의 임무 계획을 수립할 수 있다.
- Open Access
Effects of Offset Pixel Aperture Width on the Performances of Monochrome CMOS Image Sensors for Depth Extraction
This paper presents the effects of offset pixel aperture width on the performance of monochrome (MONO) CMOS image sensors (CISs) for a three-dimensional image sensor. Using a technique to integrate the offset pixel aperture (OPA) inside each pixel, the depth information can be acquired using a disparity from OPA patterns. The OPA is classified into two pattern types: Left-offset pixel aperture (LOPA) and right-offset pixel aperture (ROPA). These OPAs are divided into odd and even rows and integrated in a pixel array. To analyze the correlation between the OPA width and the sensor characteristics, experiments were conducted by configuring the test elements group (TEG) regions. The OPA width of the TEG region for the measurement varied in the range of 0.3–0.5 μm. As the aperture width decreased, the disparity of the image increased, while the sensitivity decreased. It is possible to acquire depth information by the disparity obtained from the proposed MONO CIS using the OPA technique without an external light source. Therefore, the proposed MONO CIS with OPA could easily be applied to miniaturized devices. The proposed MONO CIS was designed and manufactured using the 0.11 μm CIS process.
Open AccessEffects of Offset Pixel Aperture Width on the Performances of Monochrome CMOS Image Sensors for Depth Extraction
This paper presents the effects of offset pixel aperture width on the performance of monochrome (MONO) CMOS image sensors (CISs) for a three-dimensional image sensor. Using a technique to integrate the offset pixel aperture (OPA) inside each pixel, the depth information can be acquired using a disparity from OPA patterns. The OPA is classified into two pattern types: Left-offset pixel aperture (LOPA) and right-offset pixel aperture (ROPA). These OPAs are divided into odd and even rows and integrated in a pixel array. To analyze the correlation between the OPA width and the sensor characteristics, experiments were conducted by configuring the test elements group (TEG) regions. The OPA width of the TEG region for the measurement varied in the range of 0.3–0.5 μm. As the aperture width decreased, the disparity of the image increased, while the sensitivity decreased. It is possible to acquire depth information by the disparity obtained from the proposed MONO CIS using the OPA technique without an external light source. Therefore, the proposed MONO CIS with OPA could easily be applied to miniaturized devices. The proposed MONO CIS was designed and manufactured using the 0.11 μm CIS process.
- Open Access
Averaging Pixel Current Adjustment Technique for Reducing Fixed Pattern Noise in the Bolometer-Type Uncooled Infrared Image Sensor
In this paper, we propose an averaging pixel current adjustment technique for reducing fixed pattern noise (FPN) in the bolometer-type uncooled infrared image sensor. The averaging pixel current adjustment technique is composed of active pixel, reference pixel, and calibration circuit. Polysilicon resistors were used in each active pixel and reference pixel. Resistance deviation among active pixels integrated with the same resistance value cause FPN. The principle of the averaging pixel current adjustment technique for removing FPN is based on the subtraction of dark current of the active pixel from the dark current of the reference pixel. The subtracted current is converted into the voltage, which contains pixel calibration information. The calibration circuit is used to adjust the calibration current. After calibration, the nano-ampere current is output with small deviation. The proposed averaging pixel current adjustment technique is implemented by a chip composed of a pixel array, a calibration circuit, average current generators, and readout circuits. The chip was fabricated using a standard 0.35 μm CMOS process and its performance was evaluated.
Open AccessAveraging Pixel Current Adjustment Technique for Reducing Fixed Pattern Noise in the Bolometer-Type Uncooled Infrared Image Sensor
In this paper, we propose an averaging pixel current adjustment technique for reducing fixed pattern noise (FPN) in the bolometer-type uncooled infrared image sensor. The averaging pixel current adjustment technique is composed of active pixel, reference pixel, and calibration circuit. Polysilicon resistors were used in each active pixel and reference pixel. Resistance deviation among active pixels integrated with the same resistance value cause FPN. The principle of the averaging pixel current adjustment technique for removing FPN is based on the subtraction of dark current of the active pixel from the dark current of the reference pixel. The subtracted current is converted into the voltage, which contains pixel calibration information. The calibration circuit is used to adjust the calibration current. After calibration, the nano-ampere current is output with small deviation. The proposed averaging pixel current adjustment technique is implemented by a chip composed of a pixel array, a calibration circuit, average current generators, and readout circuits. The chip was fabricated using a standard 0.35 μm CMOS process and its performance was evaluated.
- Open Access
Analysis of Disparity Information for Depth Extraction Using CMOS Image Sensor with Offset Pixel Aperture Technique
A complementary metal oxide semiconductor (CMOS) image sensor (CIS), using offset pixel aperture (OPA) technique, was designed and fabricated using the 0.11-µm CIS process. In conventional cameras, an aperture is located on the camera lens. However, in a CIS camera using OPA technique, apertures are integrated as left-offset pixel apertures (LOPAs) and right-offset pixel apertures (ROPAs). A color pattern is built, comprising LOPA, blue, red, green, and ROPA pixels. The disparity information can be acquired from the LOPA and ROPA channels. Both disparity information and two-dimensional (2D) color information can be simultaneously acquired from the LOPA, blue, red, green, and ROPA channels. A geometric model of the OPA technique is constructed to estimate the disparity of the image, and the measurement results are compared with the estimated results. Depth extraction is thus achieved by a single CIS using the OPA technique, which can be easily adapted to commercial CIS cameras.
Open AccessAnalysis of Disparity Information for Depth Extraction Using CMOS Image Sensor with Offset Pixel Aperture Technique
A complementary metal oxide semiconductor (CMOS) image sensor (CIS), using offset pixel aperture (OPA) technique, was designed and fabricated using the 0.11-µm CIS process. In conventional cameras, an aperture is located on the camera lens. However, in a CIS camera using OPA technique, apertures are integrated as left-offset pixel apertures (LOPAs) and right-offset pixel apertures (ROPAs). A color pattern is built, comprising LOPA, blue, red, green, and ROPA pixels. The disparity information can be acquired from the LOPA and ROPA channels. Both disparity information and two-dimensional (2D) color information can be simultaneously acquired from the LOPA, blue, red, green, and ROPA channels. A geometric model of the OPA technique is constructed to estimate the disparity of the image, and the measurement results are compared with the estimated results. Depth extraction is thus achieved by a single CIS using the OPA technique, which can be easily adapted to commercial CIS cameras.
- 17 September 2018
- Published by SPIE-Intl Soc Optical Eng
- Vol. 10746, 107460P
Effects of aperture size on the performance of CMOS image sensor with pixel aperture for depth extraction
Effects of aperture size on the performance of CMOS image sensor with pixel aperture for depth extraction are investigated. In general, the aperture size is related to the depth resolution and the sensitivity of the CMOS image sensor. As the aperture size decreases, the depth resolution is improved and the sensitivity decreases. To optimize the aperture size, optical simulation using the finite-difference time-domain method was implemented. The optical simulation was performed with various aperture sizes from 0.3 μm to 1.1 μm and the optical power with the incidence angle as a function of the aperture size was evaluated. Based on the optical simulation results, the CMOS image sensor was designed and fabricated using 0.11 μm CMOS image sensor process. The effects of aperture size are investigated by comparison of the simulation and the measurement results.
- 17 September 2018
- Published by SPIE-Intl Soc Optical Eng
- Vol. 10746, 107460P
Effects of aperture size on the performance of CMOS image sensor with pixel aperture for depth extraction
Effects of aperture size on the performance of CMOS image sensor with pixel aperture for depth extraction are investigated. In general, the aperture size is related to the depth resolution and the sensitivity of the CMOS image sensor. As the aperture size decreases, the depth resolution is improved and the sensitivity decreases. To optimize the aperture size, optical simulation using the finite-difference time-domain method was implemented. The optical simulation was performed with various aperture sizes from 0.3 μm to 1.1 μm and the optical power with the incidence angle as a function of the aperture size was evaluated. Based on the optical simulation results, the CMOS image sensor was designed and fabricated using 0.11 μm CMOS image sensor process. The effects of aperture size are investigated by comparison of the simulation and the measurement results.
- 10 September 2018
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Sensors Journal
- Vol. 18 (22) , 9163-9168
In-Pixel Aperture CMOS Image Sensor for 2-D and 3-D Imaging
This paper presents a CMOS image sensor with the in-pixel aperture technique for single-chip 2-D and 3-D imaging. In conventional image sensors, the aperture is located at the camera lens. However, in the proposed image sensor, the aperture is integrated on the CMOS image sensor chip and is formed at a metal layer of the CMOS image sensor (CIS) process. A pixel array of the image sensor is composed of the W, R, B, and PA pixels (W pixel with integrated metal aperture) for extracting color and depth information. While the image of the W pixel becomes blurred with increasing distance from a focused object, the image of the PA pixel maintains the sharpness. Therefore, the depth image can be obtained using the depth from the defocus method. The size of the pixel, which is based on a four-transistor active pixel sensor with pinned photodiode, is $2.8 \,\,\mu {\mathrm{ m}} \times 2.8\,\,\mu \text{m}$ . A prototype of the proposed image sensor was fabricated using the 0.11- $\mu \text{m}$ CIS process and its performance was evaluated.
- 10 September 2018
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Sensors Journal
- Vol. 18 (22) , 9163-9168
In-Pixel Aperture CMOS Image Sensor for 2-D and 3-D Imaging
This paper presents a CMOS image sensor with the in-pixel aperture technique for single-chip 2-D and 3-D imaging. In conventional image sensors, the aperture is located at the camera lens. However, in the proposed image sensor, the aperture is integrated on the CMOS image sensor chip and is formed at a metal layer of the CMOS image sensor (CIS) process. A pixel array of the image sensor is composed of the W, R, B, and PA pixels (W pixel with integrated metal aperture) for extracting color and depth information. While the image of the W pixel becomes blurred with increasing distance from a focused object, the image of the PA pixel maintains the sharpness. Therefore, the depth image can be obtained using the depth from the defocus method. The size of the pixel, which is based on a four-transistor active pixel sensor with pinned photodiode, is $2.8 \,\,\mu {\mathrm{ m}} \times 2.8\,\,\mu \text{m}$ . A prototype of the proposed image sensor was fabricated using the 0.11- $\mu \text{m}$ CIS process and its performance was evaluated.
- 20 February 2017
- Published by SPIE-Intl Soc Optical Eng
- Vol. 10110, 101101S
Extraction of depth information for 3D imaging using pixel aperture technique
A 3dimensional (3D) imaging is an important area which can be applied to face detection, gesture recognition, and 3D reconstruction. In this paper, extraction of depth information for 3D imaging using pixel aperture technique is presented. An active pixel sensor (APS) with in-pixel aperture has been developed for this purpose. In the conventional camera systems using a complementary metal-oxide-semiconductor (CMOS) image sensor, an aperture is located behind the camera lens. However, in our proposed camera system, the aperture implemented by metal layer of CMOS process is located on the White (W) pixel which means a pixel without any color filter on top of the pixel. 4 types of pixels including Red (R), Green (G), Blue (B), and White (W) pixels were used for pixel aperture technique. The RGB pixels produce a defocused image with blur, while W pixels produce a focused image. The focused image is used as a reference image to extract the depth information for 3D imaging. This image can be compared with the defocused image from RGB pixels. Therefore, depth information can be extracted by comparing defocused image with focused image using the depth from defocus (DFD) method. Size of the pixel for 4-tr APS is 2.8 μm × 2.8 μm and the pixel structure was designed and simulated based on 0.11 μm CMOS image sensor (CIS) process. Optical performances of the pixel aperture technique were evaluated using optical simulation with finite-difference time-domain (FDTD) method and electrical performances were evaluated using TCAD.
- 20 February 2017
- Published by SPIE-Intl Soc Optical Eng
- Vol. 10110, 101101S
Extraction of depth information for 3D imaging using pixel aperture technique
A 3dimensional (3D) imaging is an important area which can be applied to face detection, gesture recognition, and 3D reconstruction. In this paper, extraction of depth information for 3D imaging using pixel aperture technique is presented. An active pixel sensor (APS) with in-pixel aperture has been developed for this purpose. In the conventional camera systems using a complementary metal-oxide-semiconductor (CMOS) image sensor, an aperture is located behind the camera lens. However, in our proposed camera system, the aperture implemented by metal layer of CMOS process is located on the White (W) pixel which means a pixel without any color filter on top of the pixel. 4 types of pixels including Red (R), Green (G), Blue (B), and White (W) pixels were used for pixel aperture technique. The RGB pixels produce a defocused image with blur, while W pixels produce a focused image. The focused image is used as a reference image to extract the depth information for 3D imaging. This image can be compared with the defocused image from RGB pixels. Therefore, depth information can be extracted by comparing defocused image with focused image using the depth from defocus (DFD) method. Size of the pixel for 4-tr APS is 2.8 μm × 2.8 μm and the pixel structure was designed and simulated based on 0.11 μm CMOS image sensor (CIS) process. Optical performances of the pixel aperture technique were evaluated using optical simulation with finite-difference time-domain (FDTD) method and electrical performances were evaluated using TCAD.
- 29 December 2016
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 131-132
Novel pixel calibration circuit for bolometer-type uncooled infrared image sensor
Lately, research on bolometer type uncooled infrared image sensor has been increasing for industrial applications. But it is hard to remove a Fixed Pattern Noise (FPN) of bolometer sensor. In this paper, a novel average-current calibration algorithm is presented for reducing bolometer resistance offset. A resistor which is produced standard CMOS process, on the average, has a deviation, respectively. We compensate for deviation of each active resistor using average-current calibration algorithm. The algorithm consists of as follows: bolometer pixel array, average current generator, current-to-voltage converters (IVCs), digital-to-analog converter (DAC), and analog-to-digital converters (ADCs). These bolometer-resistor array and readout circuit were designed and manufactured by 0.35μm standard CMOS process.
- 29 December 2016
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 131-132
Novel pixel calibration circuit for bolometer-type uncooled infrared image sensor
Lately, research on bolometer type uncooled infrared image sensor has been increasing for industrial applications. But it is hard to remove a Fixed Pattern Noise (FPN) of bolometer sensor. In this paper, a novel average-current calibration algorithm is presented for reducing bolometer resistance offset. A resistor which is produced standard CMOS process, on the average, has a deviation, respectively. We compensate for deviation of each active resistor using average-current calibration algorithm. The algorithm consists of as follows: bolometer pixel array, average current generator, current-to-voltage converters (IVCs), digital-to-analog converter (DAC), and analog-to-digital converters (ADCs). These bolometer-resistor array and readout circuit were designed and manufactured by 0.35μm standard CMOS process.