Hiroki Sugiyama
Research Subjects
Hiroki Sugiyama has a total of 109 co-authors. Here are the top co-authors by number of shared publications:
- Hideaki Matsuzaki
NTT Device Technology Laboratories, NTT Corporation, Atsugi, Japan
14 shared publications - Takuya Tsutsumi
NTT Device Technology Laboratories, NTT Corporation, Atsugi, Japan
12 shared publications - Dae-Hyun Kim
Kyungpook National University
11 shared publications - Tae-Woo Kim
Department of Electrical, Electronic and Computer Engineering, University of Ulsan, Ulsan 44610, Republic of Korea
11 shared publications - Hyeon-Bhin Jo
Department of Electronic and Electrical Engineering, Kyungpook National University, Daegu, South Korea
8 shared publications - In-Geun Lee
Department of Electronic and Electrical Engineering, Kyungpook National University, Daegu, South Korea
8 shared publications
Latest Publications
- 17 April 2026
- Published by Wiley in Physica Status Solidi (a)
- Vol. 223 (8)
Control of Strained‐InGaAs Channel Composition of InP‐Based HEMTs in Low‐Temperature Metal‐Organic Vapor‐Phase Epitaxy Growth
Low‐temperature metal‐organic vapor‐phase epitaxy growth of strained InGaAs channel in InP‐based high electron mobility transistors (HEMTs) is investigated using trimethylindium, triethylgallium, and arsine as precursors. Lowering the growth temperature is crucial for suppressing lattice relaxation and increasing the channel In content up to 0.9. To control the composition of In‐rich InGaAs, the nonlinear relationship between the solid and vapor composition should be taken into account. We successfully fabricate InP HEMT structures with an In 0.9 Ga 0.1 As channel where electron mobility of around 14,000 cm 2 V −1 s −1 at a sheet‐carrier concentration of around 2.5 × 10 12 cm −2 is obtained.
- 17 April 2026
- Published by Wiley in Physica Status Solidi (a)
- Vol. 223 (8)
Control of Strained‐InGaAs Channel Composition of InP‐Based HEMTs in Low‐Temperature Metal‐Organic Vapor‐Phase Epitaxy Growth
Low‐temperature metal‐organic vapor‐phase epitaxy growth of strained InGaAs channel in InP‐based high electron mobility transistors (HEMTs) is investigated using trimethylindium, triethylgallium, and arsine as precursors. Lowering the growth temperature is crucial for suppressing lattice relaxation and increasing the channel In content up to 0.9. To control the composition of In‐rich InGaAs, the nonlinear relationship between the solid and vapor composition should be taken into account. We successfully fabricate InP HEMT structures with an In 0.9 Ga 0.1 As channel where electron mobility of around 14,000 cm 2 V −1 s −1 at a sheet‐carrier concentration of around 2.5 × 10 12 cm −2 is obtained.
- 5 March 2026
- Published by IOP Publishing in Japanese Journal of Applied Physics
- Vol. 65 (5) , 05SP12
Impact of back-end-of-line processing on DC and RF characteristics of 60 nm-gate InP-based HEMTs for terahertz MMICs
The impact of back-end-of-line (BEOL) processing on the performance of 60 nm InP-based high electron mobility transistors (HEMTs) was investigated. After BEOL processing, a prominent kink was observed in the I d – V ds characteristics of some HEMTs, which correlated with the deterioration in the 3 nm thick InP recess-etching stopper around the gate regions. Prolonged electrochemical recess etching likely promoted the oxidation and thinning of the stopper, diminishing the surface-passivation effect. This damaged stopper made the HEMTs susceptible to BEOL processing, resulting in the degradation in the I d – V ds characteristics. To suppress this degradation, reducing the recess-etching time (or recess length) was effective in maintaining the drain current and V th . This made the HEMTs robust against BEOL processing, resulting in kink-free I d – V ds curves and better f t and f max (281.5 and 387.0 GHz, respectively) at a V gs = −0.1 V and V ds = 1.1 V after monolithic microwave integrated circuit fabrication.
- 5 March 2026
- Published by IOP Publishing in Japanese Journal of Applied Physics
- Vol. 65 (5) , 05SP12
Impact of back-end-of-line processing on DC and RF characteristics of 60 nm-gate InP-based HEMTs for terahertz MMICs
The impact of back-end-of-line (BEOL) processing on the performance of 60 nm InP-based high electron mobility transistors (HEMTs) was investigated. After BEOL processing, a prominent kink was observed in the I d – V ds characteristics of some HEMTs, which correlated with the deterioration in the 3 nm thick InP recess-etching stopper around the gate regions. Prolonged electrochemical recess etching likely promoted the oxidation and thinning of the stopper, diminishing the surface-passivation effect. This damaged stopper made the HEMTs susceptible to BEOL processing, resulting in the degradation in the I d – V ds characteristics. To suppress this degradation, reducing the recess-etching time (or recess length) was effective in maintaining the drain current and V th . This made the HEMTs robust against BEOL processing, resulting in kink-free I d – V ds curves and better f t and f max (281.5 and 387.0 GHz, respectively) at a V gs = −0.1 V and V ds = 1.1 V after monolithic microwave integrated circuit fabrication.
- Open Access
- 9 April 2024
- Published by AIP Publishing in Journal of Applied Physics
- Vol. 135 (14)
Demonstration of GaN-channel high electron mobility transistors with regrown InAs/GaAs source and drain
We demonstrated the crystal growth of group-III arsenides (III-As) on GaN via an arsenidation layer and GaN-channel electron mobility transistors (HEMTs) with a regrowth InAs/GaAs source and drain (S/D) region. By annealing under an AsH3 atmosphere, the surface of a GaN (0001) template is arsenided. We grew ⟨111⟩ oriented InAs and GaAs on arsenided GaN. Silicon-doped n-type InAs with a carrier mobility of over 1500 cm2/V s and a carrier concentration of over 1 × 1019 cm−3 was successfully obtained. The fabrication process and direct-current characteristics of GaN-channel HEMTs with the regrown Si-doped InAs/GaAs S/D region were demonstrated for the first time. A maximum transconductance estimated from transfer characteristics was as high as ∼195 mS/mm for the HEMT with a gate length of 2 μm without passivation, which is comparable to those for the HEMT without any S/D regrowth. The impact of the InAs/GaAs S/D region on the on-resistance of the fabricated HEMTs was estimated to be ∼0.9 Ω mm, which can be reduced by optimizing the device structures and process conditions. These results indicate that the process of GaN arsenidation and III-As regrowth can be used without any device performance degradation. Therefore, further lowering the ohmic contact resistivity and on-resistance of GaN-channel HEMTs is possible by maturing the manufacturing-process technology of III-As-contained GaN-channel HEMTs.
- 9 April 2024
- Published by AIP Publishing in Journal of Applied Physics
- Vol. 135 (14)
Open AccessDemonstration of GaN-channel high electron mobility transistors with regrown InAs/GaAs source and drain
We demonstrated the crystal growth of group-III arsenides (III-As) on GaN via an arsenidation layer and GaN-channel electron mobility transistors (HEMTs) with a regrowth InAs/GaAs source and drain (S/D) region. By annealing under an AsH3 atmosphere, the surface of a GaN (0001) template is arsenided. We grew ⟨111⟩ oriented InAs and GaAs on arsenided GaN. Silicon-doped n-type InAs with a carrier mobility of over 1500 cm2/V s and a carrier concentration of over 1 × 1019 cm−3 was successfully obtained. The fabrication process and direct-current characteristics of GaN-channel HEMTs with the regrown Si-doped InAs/GaAs S/D region were demonstrated for the first time. A maximum transconductance estimated from transfer characteristics was as high as ∼195 mS/mm for the HEMT with a gate length of 2 μm without passivation, which is comparable to those for the HEMT without any S/D regrowth. The impact of the InAs/GaAs S/D region on the on-resistance of the fabricated HEMTs was estimated to be ∼0.9 Ω mm, which can be reduced by optimizing the device structures and process conditions. These results indicate that the process of GaN arsenidation and III-As regrowth can be used without any device performance degradation. Therefore, further lowering the ohmic contact resistivity and on-resistance of GaN-channel HEMTs is possible by maturing the manufacturing-process technology of III-As-contained GaN-channel HEMTs.
- 7 September 2023
- Published by Japan Society of Applied Physics
Feasibility Study of InP-based Tera-Hertz-ICs Fabrication Process for Beyond 5G / 6G Wireless Network Systems
2023 International Conference on Solid State Devices and Materials ,Feasibility Study of InP-based Tera-Hertz-ICs Fabrication Process for Beyond 5G / 6G Wireless Network Systems
- 7 September 2023
- Published by Japan Society of Applied Physics
Feasibility Study of InP-based Tera-Hertz-ICs Fabrication Process for Beyond 5G / 6G Wireless Network Systems
2023 International Conference on Solid State Devices and Materials ,Feasibility Study of InP-based Tera-Hertz-ICs Fabrication Process for Beyond 5G / 6G Wireless Network Systems
- 2 May 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 70 (6) , 2988-2993
Performance Enhancement of AlGaN/GaN HEMT via Trap-State Improvement Using O2 Plasma Treatment
Herein, we present a detailed analysis of the effects of O2 plasma treatment on the AlGaN barrier volume trap states in an Al0.45Ga0.45N/GaN high-electron mobility transistor. Compared to that of the as-grown sample, the single short-pulse ${I}_{D}$ – ${V}_{\text {GS}}$ characterization of the plasma-treated sample exhibited lower charge trapping inside the AlGaN barrier. The 1/ ${f}$ low-frequency noise characterization revealed a significant reduction of approximately 67% in the volume trap density of the AlGaN barrier layer after O2 plasma treatment. This was achieved by the formation of Al–O and Ga–O bonds via the penetration of oxygen ions into the AlGaN bulk, which resulted in reduced trap state density in the AlGaN barrier. In addition, the Schottky characteristics were improved notably. Consequently, the O2 plasma-treated sample did not display current collapse and showed steady drain current output under the reverse-sweep drain-stress bias conditions. Furthermore, the plasma treatment significantly reduced the RF transconductance ( ${g}_{m}$ ) collapse in the as-grown sample, and significantly increased the ${f}_{T}/{f}_{\text {max}}$ of the plasma-treated sample from 65/70 to 120/230 GHz for ${L}_{g}$ = 80 nm devices, respectively. Last, the O2 plasma-treated sample showed substantial improvements in ${P}_{\text {out}\_\max}$ , power added efficiency (PAE), and linear gain from 1.25 W/mm, 20%, and 15 dB to 2.4 W/mm, 50%, and 19 dB, respectively.
- 2 May 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 70 (6) , 2988-2993
Performance Enhancement of AlGaN/GaN HEMT via Trap-State Improvement Using O2 Plasma Treatment
Herein, we present a detailed analysis of the effects of O2 plasma treatment on the AlGaN barrier volume trap states in an Al0.45Ga0.45N/GaN high-electron mobility transistor. Compared to that of the as-grown sample, the single short-pulse ${I}_{D}$ – ${V}_{\text {GS}}$ characterization of the plasma-treated sample exhibited lower charge trapping inside the AlGaN barrier. The 1/ ${f}$ low-frequency noise characterization revealed a significant reduction of approximately 67% in the volume trap density of the AlGaN barrier layer after O2 plasma treatment. This was achieved by the formation of Al–O and Ga–O bonds via the penetration of oxygen ions into the AlGaN bulk, which resulted in reduced trap state density in the AlGaN barrier. In addition, the Schottky characteristics were improved notably. Consequently, the O2 plasma-treated sample did not display current collapse and showed steady drain current output under the reverse-sweep drain-stress bias conditions. Furthermore, the plasma treatment significantly reduced the RF transconductance ( ${g}_{m}$ ) collapse in the as-grown sample, and significantly increased the ${f}_{T}/{f}_{\text {max}}$ of the plasma-treated sample from 65/70 to 120/230 GHz for ${L}_{g}$ = 80 nm devices, respectively. Last, the O2 plasma-treated sample showed substantial improvements in ${P}_{\text {out}\_\max}$ , power added efficiency (PAE), and linear gain from 1.25 W/mm, 20%, and 15 dB to 2.4 W/mm, 50%, and 19 dB, respectively.
- Open Access
- 10 April 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in Journal of Lightwave Technology
- Vol. 41 (12) , 3866-3873
Micro-Transfer-Printed Membrane Distributed Reflector Lasers on Si Waveguide Modulated With 50-Gbit/s NRZ Signal
In this work, we fabricate directly modulated membrane distributed reflector (DR) lasers on a Si waveguide by utilizing micro-transfer printing method. Micro-transfer printing enables low-loss coupling between the lasers and the silicon photonics circuit, and since it is a back-end process, we can test the lasers prior to integration. A membrane laser is as thick as the Si waveguides, which makes optical coupling between the two quite easy. In addition, membrane lasers with a lateral p-i-n diode structure have low capacitance and a large optical confinement factor, which means they can achieve a low threshold current and high-speed modulation operation with low energy consumption. The fabricated membrane DR laser integrated with a 220-nm-thick Si waveguide exhibits a low threshold current of 1.2 mA and single-mode operation at 1535 nm with a side-mode suppression ratio (SMSR) of about 40 dB at the bias current of 14 mA. It also achieves the E-O bandwidth of over 25 GHz and 50-Gbit/s non-return-to-zero (NRZ) signal modulation with an extinction ratio of 2.5 dB.
- 10 April 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in Journal of Lightwave Technology
- Vol. 41 (12) , 3866-3873
Open AccessMicro-Transfer-Printed Membrane Distributed Reflector Lasers on Si Waveguide Modulated With 50-Gbit/s NRZ Signal
In this work, we fabricate directly modulated membrane distributed reflector (DR) lasers on a Si waveguide by utilizing micro-transfer printing method. Micro-transfer printing enables low-loss coupling between the lasers and the silicon photonics circuit, and since it is a back-end process, we can test the lasers prior to integration. A membrane laser is as thick as the Si waveguides, which makes optical coupling between the two quite easy. In addition, membrane lasers with a lateral p-i-n diode structure have low capacitance and a large optical confinement factor, which means they can achieve a low threshold current and high-speed modulation operation with low energy consumption. The fabricated membrane DR laser integrated with a 220-nm-thick Si waveguide exhibits a low threshold current of 1.2 mA and single-mode operation at 1535 nm with a side-mode suppression ratio (SMSR) of about 40 dB at the bias current of 14 mA. It also achieves the E-O bandwidth of over 25 GHz and 50-Gbit/s non-return-to-zero (NRZ) signal modulation with an extinction ratio of 2.5 dB.
- Open Access
- 12 February 2023
- Published by MDPI AG in Micromachines
- Vol. 14 (2) , 439
Analytical and Physical Investigation on Source Resistance in InxGa1−xAs Quantum-Well High-Electron-Mobility Transistors
We present a fully analytical model and physical investigation on the source resistance (RS) in InxGa1−xAs quantum-well high-electron mobility transistors based on a three-layer TLM system. The RS model in this work was derived by solving the coupled quadratic differential equations for each current component with appropriate boundary conditions, requiring only six physical and geometrical parameters, including ohmic contact resistivity (ρc), barrier tunneling resistivity (ρbarrier), sheet resistances of the cap and channel regions (Rsh_cap and Rsh_ch), side-recessed length (Lside) and gate-to-source length (Lgs). To extract each model parameter, we fabricated two different TLM structures, such as cap-TLM and recessed-TLM. The developed RS model in this work was in excellent agreement with the RS values measured from the two TLM devices and previously reported short-Lg HEMT devices. The findings in this work revealed that barrier tunneling resistivity already played a critical role in reducing the value of RS in state-of-the-art HEMTs. Unless the barrier tunneling resistivity is reduced considerably, innovative engineering on the ohmic contact characteristics and gate-to-source spacing would only marginally improve the device performance.
- 12 February 2023
- Published by MDPI AG in Micromachines
- Vol. 14 (2) , 439
Open AccessAnalytical and Physical Investigation on Source Resistance in InxGa1−xAs Quantum-Well High-Electron-Mobility Transistors
We present a fully analytical model and physical investigation on the source resistance (RS) in InxGa1−xAs quantum-well high-electron mobility transistors based on a three-layer TLM system. The RS model in this work was derived by solving the coupled quadratic differential equations for each current component with appropriate boundary conditions, requiring only six physical and geometrical parameters, including ohmic contact resistivity (ρc), barrier tunneling resistivity (ρbarrier), sheet resistances of the cap and channel regions (Rsh_cap and Rsh_ch), side-recessed length (Lside) and gate-to-source length (Lgs). To extract each model parameter, we fabricated two different TLM structures, such as cap-TLM and recessed-TLM. The developed RS model in this work was in excellent agreement with the RS values measured from the two TLM devices and previously reported short-Lg HEMT devices. The findings in this work revealed that barrier tunneling resistivity already played a critical role in reducing the value of RS in state-of-the-art HEMTs. Unless the barrier tunneling resistivity is reduced considerably, innovative engineering on the ohmic contact characteristics and gate-to-source spacing would only marginally improve the device performance.
- 10 January 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 70 (4) , 2081-2089
Sub-50 nm Terahertz In0.8Ga0.2As Quantum-Well High-Electron-Mobility Transistors for 6G Applications
We present a systematic study on the gate length (${L}_{{g}}\text {)}$ scaling behavior and the impact of the side-recess spacing (${L}_{\text {side}}\text {)}$ on dc and high-frequency characteristics of In0.8Ga0.2As quantum-well (QW) high-electron-mobility transistors (HEMTs) with${L}_{{g}}$ from 10$\mu $ m to 20 nm, for the purpose of understanding the scaling limit of maximum oscillation frequency (${f}_{\text {max}}\text {)}$ and thereby demonstrating terahertz devices. The fabricated In0.8Ga0.2As QW HEMTs with${L}_{{g}} =20$ nm and${L}_{\text {side}} =150$ nm exhibited values of drain-induced-barrier-lowering (DIBL) of 60 mV/V, current-gain cutoff frequency (${f}_{{T}}\text {)}$ of 0.75 THz, and${f}_{\text {max}}$ of 1.1 THz, while the device with${L}_{\text {side}} =50$ nm showed DIBL of 110 mV/V and${f}_{{T}}$ /${f}_{\text {max}}$ of 0.72/0.53 THz. It was central to strictly control short-channel effects (SCEs) from the perspective of DIBL to maximize the improvement of${f}_{\text {max}}$ , as${L}_{{g}}$ was scaled down deeply. In an effort to understand the${L}_{{g}}$ scaling behavior of${f}_{\text {max}}$ , we carried out the small-signal modeling for both types of devices and found that the increase of the intrinsic output conductance (${g}_{\text {oi}}\text {)}$ played a critical role in determining${f}_{\text {max}}$ in short-${L}_{{g}}$ HEMTs. On the contrary, the fabricated devices with${L}_{\text {side}} =150$ nm exhibited a tight control of SCEs at${L}_{{g}}$ of 20 nm. As a result,${f}_{\text {max}}$ in those devices was boosted to 1.1 THz, and more importantly this high${f}_{\text {max}}$ was maintained even as${L}_{{g}}$ was scaled down to 20 nm. The results in this work represent the best balance of${f}_{{T}}$ and${f}_{\text {max}}$ in any transistor technology on any material system, displaying both${f}_{{T}}$ and${f}_{\text {max}}$ in excess of 700 GHz simultaneously.- 10 January 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 70 (4) , 2081-2089
Sub-50 nm Terahertz In0.8Ga0.2As Quantum-Well High-Electron-Mobility Transistors for 6G Applications
We present a systematic study on the gate length (${L}_{{g}}\text {)}$ scaling behavior and the impact of the side-recess spacing (${L}_{\text {side}}\text {)}$ on dc and high-frequency characteristics of In0.8Ga0.2As quantum-well (QW) high-electron-mobility transistors (HEMTs) with${L}_{{g}}$ from 10$\mu $ m to 20 nm, for the purpose of understanding the scaling limit of maximum oscillation frequency (${f}_{\text {max}}\text {)}$ and thereby demonstrating terahertz devices. The fabricated In0.8Ga0.2As QW HEMTs with${L}_{{g}} =20$ nm and${L}_{\text {side}} =150$ nm exhibited values of drain-induced-barrier-lowering (DIBL) of 60 mV/V, current-gain cutoff frequency (${f}_{{T}}\text {)}$ of 0.75 THz, and${f}_{\text {max}}$ of 1.1 THz, while the device with${L}_{\text {side}} =50$ nm showed DIBL of 110 mV/V and${f}_{{T}}$ /${f}_{\text {max}}$ of 0.72/0.53 THz. It was central to strictly control short-channel effects (SCEs) from the perspective of DIBL to maximize the improvement of${f}_{\text {max}}$ , as${L}_{{g}}$ was scaled down deeply. In an effort to understand the${L}_{{g}}$ scaling behavior of${f}_{\text {max}}$ , we carried out the small-signal modeling for both types of devices and found that the increase of the intrinsic output conductance (${g}_{\text {oi}}\text {)}$ played a critical role in determining${f}_{\text {max}}$ in short-${L}_{{g}}$ HEMTs. On the contrary, the fabricated devices with${L}_{\text {side}} =150$ nm exhibited a tight control of SCEs at${L}_{{g}}$ of 20 nm. As a result,${f}_{\text {max}}$ in those devices was boosted to 1.1 THz, and more importantly this high${f}_{\text {max}}$ was maintained even as${L}_{{g}}$ was scaled down to 20 nm. The results in this work represent the best balance of${f}_{{T}}$ and${f}_{\text {max}}$ in any transistor technology on any material system, displaying both${f}_{{T}}$ and${f}_{\text {max}}$ in excess of 700 GHz simultaneously.- Open Access
- 4 January 2023
- Published by MDPI AG in Electronics
- Vol. 12 (2) , 259
Impact of Output Conductance on Current-Gain Cut-Off Frequency in InxGa1-xAs/In0.52Al0.48As Quantum-Well High-Electron-Mobility Transistors on InP Substrate
In this study, we investigated the impact of intrinsic output conductance (goi) on the short-circuit current-gain cut-off frequency (fT) in InxGa1-xAs/In0.52Al0.48As quantum-well (QW) high-electron-mobility transistors. At its core, we attempted to extract values of fT using a simplified small-signal model (SSM) of the HEMTs and to derive an analytical formula for fT in terms of extrinsic model parameters that are related with intrinsic model parameters of a general SSM. We projected how fT was influenced by goi in HEMTs, emphasizing that the improvement in electrostatic integrity would also be of critical importance to fully benefit from scaling down Lg.
- 4 January 2023
- Published by MDPI AG in Electronics
- Vol. 12 (2) , 259
Open AccessImpact of Output Conductance on Current-Gain Cut-Off Frequency in InxGa1-xAs/In0.52Al0.48As Quantum-Well High-Electron-Mobility Transistors on InP Substrate
In this study, we investigated the impact of intrinsic output conductance (goi) on the short-circuit current-gain cut-off frequency (fT) in InxGa1-xAs/In0.52Al0.48As quantum-well (QW) high-electron-mobility transistors. At its core, we attempted to extract values of fT using a simplified small-signal model (SSM) of the HEMTs and to derive an analytical formula for fT in terms of extrinsic model parameters that are related with intrinsic model parameters of a general SSM. We projected how fT was influenced by goi in HEMTs, emphasizing that the improvement in electrostatic integrity would also be of critical importance to fully benefit from scaling down Lg.
- 21 December 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 44 (2) , 229-232
A New Methodology to Analyze Carrier Transport Properties for In x Ga1−x As Quantum-Well High-Electron Mobility Transistors From Transconductance in Saturation
Conventional techniques to characterize the carrier transport properties in high-electron-mobility transistors do not account for the effect of each individual unit process and device integration, and can be challenging to use for short-channel devices. To overcome this, we have developed a new technique that consists of measurement and analysis of the transconductance scaling behavior. The proposed ${g}_{m}$ modeling technique yielded the effective mobility, $\mu _{n\_{}{\textit {eff}}}$ , and saturation velocity, ${v}_{\textit {sat}}$ for fabricated InxGa $_{{1}-{x}}$ As Quantum-Well (QW) HEMTs, correlating the carrier transport properties to the device characteristics. This helps illuminate the physics of the carrier transport properties of HEMTs from the mobility relevant to the velocity saturation regimes.
- 21 December 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 44 (2) , 229-232
A New Methodology to Analyze Carrier Transport Properties for In x Ga1−x As Quantum-Well High-Electron Mobility Transistors From Transconductance in Saturation
Conventional techniques to characterize the carrier transport properties in high-electron-mobility transistors do not account for the effect of each individual unit process and device integration, and can be challenging to use for short-channel devices. To overcome this, we have developed a new technique that consists of measurement and analysis of the transconductance scaling behavior. The proposed ${g}_{m}$ modeling technique yielded the effective mobility, $\mu _{n\_{}{\textit {eff}}}$ , and saturation velocity, ${v}_{\textit {sat}}$ for fabricated InxGa $_{{1}-{x}}$ As Quantum-Well (QW) HEMTs, correlating the carrier transport properties to the device characteristics. This helps illuminate the physics of the carrier transport properties of HEMTs from the mobility relevant to the velocity saturation regimes.