Sandeep Anand

Reliable interleaved dc-dc converters are desirable in numerous applications, including but not limited to, electric vehicle chargers, dc micro-grids, data centers, and industrial power supplies. In these power converters, cyclic variations in the temperature of power semiconductor devices (PSDs) occur due to varying load power and/or ambient conditions. These temperature swings cause degradation and eventual failure of PSDs, which affects system reliability. To enhance the expected lifetime of PSDs in interleaved dc-dc converters, this article proposes a current circulation strategy for active thermal control. The proposed thermal controller uses sinusoidal current circulation to thoughtfully change the power loss in PSDs and reduce the overall swings in their temperature. In addition to the reduction in temperature swings, the average thermal stress of the PSDs in each parallel connected converters is also equalized, despite the presence of practical non-uniformities in the design. Note that these changes in the thermal profile of the PSDs are done without altering the load power requirement with no extra circuitry required. The selection of parameters in the proposed thermal controller and their effect on the overall system performance are also delineated. Lastly, the effectiveness of the suggested approach for changing power loss in the PSDs is validated. A 1.5 kW solar PV to battery charger is developed to validate the proposed technique, in which the expected lifetime of the PSDs is increased by up to 37.8%.

Silicon carbide (SiC) MOSFETs have a low short-circuit (SC) withstand capacity. Hence, an SC detection circuit with a low SC detection time ($\boldsymbol{t}_\boldsymbol{SCD}$) and high robustness is required to achieve an effective SC protection for SiC MOSFETs. To achieve both the objectives simultaneously, mostly two-stage SC detection techniques are suggested in the literature. The primary stage in these techniques is designed to have a very low $\boldsymbol{t}_\boldsymbol{SCD}$. However, a few of the suggested primary stage are known to have a low robustness while the others are known to be incapable of detecting a fault under load (FUL) SC condition. To improve the overall robustness and to identify FUL, a desaturation (DESAT)-based SC detection technique is usually used as a secondary stage. In a DESAT-based technique, the reference voltage ($\boldsymbol{V}_\mathbf{REF}$) for SC detection is kept based on the power device output characteristic and its worst-case operating junction temperature ($\boldsymbol{T}_\boldsymbol{J}$). However, this leads to a suboptimal $\boldsymbol{t}_\boldsymbol{SCD}$ as the device may not be operating at its worst-case $\boldsymbol{T}_\boldsymbol{J}$ preceeding an SC event. Thereby, this may adversely affect the SC protection effectiveness by making the secondary stage slower. To address the aforementioned challenge, this manuscript proposes a novel technique to adaptively vary $\boldsymbol{V}_\boldsymbol{REF}$ based on the feedback of $\boldsymbol{T}_\boldsymbol{J}$ to achieve an optimal $\boldsymbol{t}_\boldsymbol{SCD}$. Further, the mathematical formulation for the rate at which $\boldsymbol{V}_\boldsymbol{REF}$ should be varied and operational constraints necessary to mitigate a misdetection during normal operation are also determined. Experimental investigation of the proposed technique is carried out by conducting SC at 800 V on a 1.2 kV rated SiC MOSFET. Results show up to 24.3% reduction in $\boldsymbol{t}_\boldsymbol{SCD}$ compared with the existing secondary protection technique.

The Hall sensor-based rotor position estimation is widely used to implement field-oriented control (FOC) in low-power (1–7 kW) permanent magnet synchronous motor (PMSM) drives, such as two or three wheeler electric vehicles (EVs). However, existing methods suffer from significant errors during rapid acceleration or deceleration, leading to reduced average torque. This deteriorates the transient performance of the drivetrain and can even cause the vehicle to stall under peak load conditions especially at low speeds of operation. To address this issue, this article proposes a rotor position error-based adaptive controller for PMSMs utilizing Hall-effect position sensors. The proposed strategy increases the average torque by dynamically selecting between FOC with fixed-theta mode (FTM) and FOC with variable-theta mode (VTM). The technique for estimating rotor position error in real time has been presented. The switching threshold between the FTM and VTM modes is analytically determined to maximize torque output. In addition, the proposed approach ensures that the average torque remains the same before and after transitions, eliminating the need for throttle adjustments by the user. A Lyapunov-based stability analysis is performed to ensure the stability of the proposed controller. The proposed technique is validated through simulations and experimentation studies carried out on the developed motor controller setup.

Increasing the power rating of onboard chargers (OBCs) and auxiliary power modules (APMs) is constrained by cost and size. Integrating OBC with APM mitigates these challenges. This article proposes a converter integrating OBC and APM using minimum active switches. The proposed integrated power converter (IPC) comprises two transformers and three bridge converters connected to dc-link of frontend rectifier, high voltage (HV) traction battery, and low voltage (LV) auxiliary battery. During OBC operation, simultaneous power transfer to HV and LV batteries leads to current cancellation, reducing rms current in one of the bridge legs common for both power flow paths. Current cancellation and converter power loss depend upon IPC design parameters, which are turns ratio and leakage inductances of two transformers. This article introduces three design approaches and compares IPC performance with these approaches analytically and experimentally. In addition, a control strategy is suggested to ensure desired power flow across different power paths. A laboratory-developed prototype integrating 1 kW OBC and 350 W APM for a light electric vehicle is fabricated to validate IPC performance with three design approaches. In addition to reduced device count, proposed IPC achieves 0.7 % improvement in efficiency compared to its nonintegrated version with similar circuit configuration.

The series stacked active power decoupling (SS-APD) circuit is a power dense and efficient alternative for ripple energy storage in single phase power converter. The SS-APD circuit needs to absorb a small amount of real power to meet power losses in it. For this, the literature uses additional power supply or modifies the controller for SS-APD circuit. Such modified controllers require high bandwidth current sensing or noise-prone differentiation function. To address these challenges, this paper proposes a conductance emulation control for SS-APD circuit. Here, the value of emulated conductance dictates the real power absorbed by the SS-APD circuit. It eliminates the need for differentiation function, dc-link current sensing and additional power supply for absorbing real power. Further, it uses feedback of dc-link voltage and enables independent control of SS-APD circuit from the single-phase converter. The proposed technique is investigated using state-plane analysis and small signal impedance analysis to highlight the design dependencies. In addition, the practical challenges such as proper sensing of ripple in dc-link voltage are also addressed. The load transient and steady-state performance of the proposed technique are validated by experimental studies with a 2 kW laboratory prototype.

Normally on wide-bandgap (WBG) devices switch faster and have lower power loss compared to similarly rated normally off devices. However, their application in voltage-fed power electronic converters is limited due to the risk of the dc-link short-circuit condition. Several techniques are proposed in the literature to address this problem. However, some drawbacks exist, first, the use of several additional components; second, slow response to the short-circuit condition; and third, increased power losses. To overcome these challenges, this article presents an ultrafast self-powered circuit for gate driving of normally on WBG transistors. The proposed circuit provides a sufficient negative voltage to the gate-to-source of the normally on device immediately after the converter power-up. Moreover, the proposed circuit does not change the operation of the converter under normal operating conditions. The operating principle and design considerations of the proposed circuit are discussed in detail. Furthermore, SPICE simulations are used to validate the proposed circuit. Finally, an experimental prototype of a normally on silicon carbide (SiC) junction field effect transistor (JFET)-based forward converter with the proposed circuit is built to verify the analysis. It is shown experimentally that the response time of the proposed circuit is 2 $\mu$ s during converter power-up.

This paper proposes a distributed secondary controller for dc microgrid which achieves both current sharing and voltage regulation by exchanging just one variable per converter. Generally, output current and voltage information are used by secondary controllers to attain both these objectives. With more sources, the amount of data to be handled, and thus the bandwidth required by the communication network, is more. On the contrary, in the proposed controller, an intermediate variable, which is the combination of per-unit current and voltage measurements, is generated. The global average estimate of this intermediate variable, evaluated through consensus protocol, is communicated among neighboring controllers. The secondary control action is to add a voltage shift to the reference voltage, ultimately achieving both control objectives. The steady state operating condition of the proposed controller is derived, and the stability of the dc microgrid is analyzed by tracing the dominant poles of the system. The operation of the proposed controller is verified with MATLAB/Simulink platform and through experiments on a dc microgrid laboratory prototype. The proposed controller shows better performance compared to other single variable communication based secondary controllers.

Active thermal control (ATC) is popularly used for the reduction of junction temperature swings and for enhancing the reliability of power semiconductor devices (PSDs). Gate voltage variation has the potential to be an effective method for ATC by manipulation of power loss in the PSD. However, gate voltage variation in the ohmic region of static I-V characteristics does not change the power loss in PSD significantly. To address this challenge, this article proposes an ATC technique based on gate voltage variation in the saturation region of PSD. With the proposed controller, a wide range of power loss manipulation is achieved. Moreover, it avoids false triggering of desaturation protection through a suitable selection of gate voltage. The relationship between gate voltage and power loss in PSD is derived and found to be nonlinear in nature. The proposed controller compensates for this nonlinearity to achieve smooth control over the power loss in PSD. The simulation and experimental validation of the proposed controller are carried out on a laboratory prototype of a dc–dc buck converter for battery charging application. Using the proposed controller, a lifetime improvement of 43% is estimated for a typical mission profile.

The junction temperature ( T_j ) estimation of IGBTs is critical for improving their reliability. To obtain T_j , the existing reference point temperature (RPT) measurement based methods require the power loss information, which is difficult to obtain accurately in the real-time applications. Also, these methods utilise the thermal model of IGBT which changes with ageing, resulting in an error in T_j estimation. In this paper, a T_j estimation technique is proposed which utilises the temperature of multiple leads/terminals of an IGBT module. Unlike the existing methods, the proposed technique does not require the information of power losses in the power semiconductor chips (PSCs). Instead, the power losses in the PSCs are additional outcome of the proposed technique. Also, even for a degraded IGBT module, the proposed technique provides an accurate T_j estimation. The proposed technique also has the capability of estimating T_j of multiple PSCs in an IGBT module simultaneously. A mathematical analysis of leads selection for the proposed technique is presented in this paper. Furthermore, a comparative analysis is presented between the proposed and the conventional method for a degraded IGBT module. The simulation studies of the proposed technique are carried out in ANSYS ICEPAK software. The proposed technique is also validated on an experimental setup developed in the laboratory.

Aluminum electrolytic capacitors (AECs) and power semiconductor devices (PSDs) are typically identified as weak links in the reliable design of power converters. To eliminate the AECs from the design, active power decoupling (APD) circuits are preferred in single-phase power converters. However, in an attempt to eliminate AECs, this approach introduces the latter weak link in the design, i.e., PSDs in the APD circuit. This article proposes an active thermal control technique to improve the reliability of PSDs in the buck APD circuit. The proposed technique reduces the swing in junction temperature of PSDs using noninvasive power loss modulation. The power loss in PSDs is changed by varying the average voltage across the buffer capacitor. Further, a control technique is suggested to synthesize the reference for average voltage across buffer capacitor. This controller accounts for nonlinearities and minimum/maximum limits of power loss modulation. Further, the additional energy loss due to power loss modulation is restricted to a predefined limit. The proposed technique is validated with the help of circuit simulations and experimental studies with a 500 W laboratory prototype. For the selected mission profile, an increase of 28.5% in the lifetime of PSDs in buck APD circuit is estimated.