Salim El Kazzi

Croissance épitaxiale d'hétérostructures antimoniées sur substrats fortement désadaptés en maille pour applications aux transistors à effet de champ: La nécessité de diminuer la consommation à la fois des systèmes autonomes communicants à haute fréquence et des circuits CMOS implique l’utilisation de transistors fonctionnant sous faible tension d’alimentation. Les performances des composants à base de silicium se dégradant rapidement dans ce régime de fonctionnement, les semiconducteurs III-V à faible bande interdite sont aujourd’hui envisagés comme une alternative. Parmi ceux-ci, l’InAs paraît le plus prometteur. Dans ce contexte, ce travail a pour but d’ouvrir la voie à l'utilisation d’un canal à base d'InAs pour les systèmes analogiques et numériques. Plus précisément, nous étudions la croissance par épitaxie par jets moléculaires des hétérostructures InAs/AlSb sur des substrats (001) GaAs et GaP par l’intermédiaire d'une couche tampon Ga(Al)Sb. La microscopie à force atomique, la microscopie électronique en transmission et la diffraction d’électrons de haute énergie sont utilisées afin de mettre en évidence l’influence critique des conditions de croissance sur la nucléation des antimoniures. Cette étude sert de base à l’optimisation de canaux InAs à haute mobilité sur ces deux substrats fortement désadaptés en maille. Les résultats obtenus dans le cas de GaP sont ensuite étendus au cas de pseudo-substrats commerciaux GaP/Si de haute qualité cristalline pour l’intégration de matériaux à base d’InAs sur des substrats Si (001) exactement orientés. Des mobilités électroniques atteignant 28 000 cm-2.V-1.s-1 à 300K et supérieures à 100 000 cm-2.V-1.s-1 à 77K sont démontrées.

Two-dimensional (2D) films, such as tungsten disulfide (WS2), are being considered by the microelectronics industry as promising barrier and liner systems for the back-end-of-line (BEOL) metal interconnects. To maximize their efficiency, processes to integrate large grain size 2D barriers in BEOL should be explored. In this work, we investigate the use of large grain WS2 films, which are obtained by the epitaxy of the 2D film on sapphire substrates and then transferred into the dielectric. After demonstrating that a hydrogen disulfide passivation technique can help overcome film transfer challenges, we show that large grain size 2D films have enhanced barrier efficiency. Our results are benchmarked against commercially available TaN systems, proving that thin 2D films are advantageous in reducing metal diffusion in BEOL dielectrics.

In this paper, dry etched vertical nanowires (VNWs) are used in transmission line/transfer length analysis to study the contacts of gate-all-around devices for future technology nodes. VNW resistors with Mo and Pd based metal stack contacts to p-InGaAs show Schottky behavior, unlike the planar counterpart. The resistance for Mo contact is higher than Pd, however, Pd was found to form an alloy with InGaAs at temperatures as low as 190 °C, and the length of Pd diffusion into the InGaAs increased at smaller NW dimensions, hindering future scalability. The minimum extracted specific contact resistivity (ρ_C) values are 1.6 × 10⁻⁵ Ω cm² (Mo) and 4.2 × 10⁻⁶ Ω cm² (Pd) for a doping level of 1 × 10¹⁹ cm⁻³. An apparent dependence of ρ_C on the NW diameter was also observed. This has been attributed to the surface states under the un-gated region of NW devices and found to dominate at smaller diameters. An analytical model to account for such geometrical effects has also been developed and validated with technology computer-aided design simulations. The analysis presented in this paper effectively captures the 3D aspects of an NW contact at nanoscale dimensions and can be applied irrespective of the semiconductor and contact metal used.

Two-dimensional transition metal dichalcogenide (TMD) semiconductors have risen as an important material class for novel nanoelectronic applications. Molybdenum disulfide (MoS₂) is the most representative TMD compound due to its superior stability and attractive properties for (opto-) electronic devices. However, the synthesis of single-crystalline and functional MoS₂ across large-area substrates remains crucial for its successful integration in semiconductor industry platforms. Therefore, this work focuses on the study of MoS₂ epitaxy via two well-established industry-compatible synthesis methods, promising for the large-area and single-crystalline integration of van der Waals (vdW) materials. These methods are molecular beam epitaxy (MBE) and metalorganic vapor phase epitaxy (MOVPE) and have studied MoS₂ quasi-vdW heteroepitaxy on reconstructed sapphire substrates and MoS₂ vdW homoepitaxy on exfoliated MoS₂ flakes. By examining the MoS₂ structural properties using diffraction and spectroscopy techniques, the epitaxial relation and crystal quality are assessed, which reveals insights into the prevalence of inter- and intragrain defects such as grain boundaries and sulfur vacancies. The MBE method yields superior epitaxial MoS₂ registry on both sapphire and MoS₂ surfaces as compared to MOVPE, although inferior defectivity arises from the typical lower MBE growth temperature and chalcogen partial pressure. Moreover, both synthesis methods generate high densities of twinned MoS₂ grain boundaries, which hamper defect-free integration. As a result, this challenging integration might become an important bottleneck for industrial TMD-based applications with a low tolerance for material defects.

The rapid cadence of MOSFET scaling is stimulating the development of new technologies and accelerating the introduction of new semiconducting materials as silicon alternative. In this context, 2D materials with a unique layered structure have attracted tremendous interest in recent years, mainly motivated by their ultra-thin body nature and unique optoelectronic and mechanical properties. The development of scalable synthesis techniques is obviously a fundamental step towards the development of a manufacturable technology. Metal-organic chemical vapor deposition has recently been used for the synthesis of large area TMDs, however, an important milestone still needs to be achieved: the ability to precisely control the number of layers and surface uniformity at the nano-to micro-length scale to obtain an atomically flat, self-passivated surface. In this work, we explore various fundamental aspects involved in the chemical vapor deposition process and we provide important insights on the layer-dependence of epitaxial MoS ₂ film’s structural properties. Based on these observations, we propose an original method to achieve a layer-controlled epitaxy of wafer-scale TMDs.

Dopant pockets in combination with a III-V heterostructure have become a staple in simulations of tunnel field-effect transistors (TFET) to achieve acceptable on-currents (ION) and to break the ION-subthreshold swing (SS) trade-off in pTFETs. Questions on the scalability and variability of these dopant pockets remain, however. We therefore propose an alternative concept using two opposite sheet charges at the tunnel junction that are realized by exploiting different bonding types. With fully quantum mechanical 30-band k.p-based simulations, we investigate two configurations that exhibit such sheet charges both at the device level and in a ring-oscillator: a lattice-matched GaAs-Ge-GaAs heterostructure TFET and a homostructure InGaAs TFET. By comparing to pocketed broken gap GaSb-InAs TFETs, we show that built-in sheet charge is a valid alternative for both nTFET and pTFET, with the prospect of lower variability and better scalability.

We present in this paper the use of Gas Source Molecular Beam Epitaxy for the large-scale growth of transition metal dichalcogenides. Fiber-textured MoS₂ co-deposited thin films (down to 1 MLs) are grown on commercially 200 mm wafer size templates where MX₂ crystalline layers are achieved at temperatures ranging from RT to 550 °C. Raman Spectroscopy and photoluminescence measurements along with X-Ray Photoelectron Spectroscopy show that a low growth rate is essential for complete Mo sulfurization during MoS₂ co-deposition. Finally, cross-section Transmission Electron Microscopy investigations are discussed to highlight the influence of SiO₂ and Al₂O₃ used surfaces on MoS₂ deposition.

We report high performance, dry etched In _0.53 Ga _0.47 As vertical nanowire and vertical nanosheet devices, fabricated using a VLSI compatible process flow. Scaling the effective-oxide-thickness in combination with (NH4)2S channel treatment and forming gas anneal improves the device performance, in terms of Q (Gm/SS), by over 55%. At V _DS = 0.5V, the devices exhibit a minimum SS = 63mV/dec, I _on = 397μA/μm at Ioff = 100nA/μm, peak Gm = 1.6mS/μm and maximum Q = 21. These values are the best reported in literature for vertical IIIV devices. A reliability analysis puts these vertical MOSFETs in line with other IIIV devices with similar gate stack, indicating that the process flow does not introduce additional interface defects.

We have validated that the electrical performances of the In_0.53Ga_0.47As MOSFETs such as sub-threshold slope (SS) and electron mobility were dependent on interfacial reactions in the metal/highk/InGaAs gate stacks which could be controlled remotely by choice of the metal electrodes. We demonstrated In_0.53Ga_0.47As MOSFETs with high mobility (peak mobility ~1300 cm²/Vs) and superior SS performance (SS 76.4 mV/dec) at the scaled CET region owing to the remote reduction of the native III-V oxide by the TiN electrodes.