Chong-Rong Huang

This study compared the effectiveness of gallium nitride (GaN) with a single carbon-doped (C-doped) buffer layer and a composite carbon/iron-doped (C/Fe-doped) buffer layer within an AlGaN/GaN high-electron-mobility transistor (HEMT). In traditional power devices, Fe-doping has a large memory effect, causing Fe ions to diffuse outwards, which is undesirable in high-power-device applications. In the present study, a C-doped GaN layer was added above the Fe-doped GaN layer to form a composite buffer against Fe ion diffusion. Direct current (DC) characteristics, pulse measurement, low-frequency noise, and variable temperature analysis were performed on both devices. The single C-doped buffer layer in the AlGaN/GaN HEMT had fewer defects in capturing and releasing carriers, and better dynamic characteristics, whereas the composite C/Fe-doped buffers, by suppressing Fe migration toward the channel, showed higher vertical breakdown voltage and lower sheet resistance, and still demonstrated potential for further performance tuning to achieve enhanced semi-insulating behavior. With optimized doping concentrations and layer thicknesses, the dual-layer configuration offers a promising path toward improved trade-offs between leakage suppression, trap control, and dynamic performance for next-generation GaN-based power devices.

This study optimized the field plate (FP) design (i.e., the number and positions of FP layers) of p-GaN power high-electron-mobility transistors (HEMTs) on the basic of simulations conducted using the technology computer-aided design software of Silvaco. Devices with zero, two, and three FP layers were designed. The FP layers of the HEMTs dispersed the electric field between the gate and drain regions. The device with two FP layers exhibited a high off-state breakdown voltage of 1549 V because of the long distance between its first FP layer and the channel. The devices were subjected to high-temperature reverse bias and high-temperature gate bias measurements to examine their characteristics, which satisfied the reliability specifications of JEDEC.

A p-GaN HEMT with an AlGaN cap layer was grown on a low resistance SiC substrate. The AlGaN cap layer had a wide band gap which can effectively suppress hole injection and improve gate reliability. In addition, we selected a 0° angle and low resistance SiC substrate which not only substantially reduced the number of lattice dislocation defects caused by the heterogeneous junction but also greatly reduced the overall cost. The device exhibited a favorable gate voltage swing of 18.5 V (@I_GS = 1 mA/mm) and an off-state breakdown voltage of 763 V. The device dynamic characteristics and hole injection behavior were analyzed using a pulse measurement system, and Ron was found to increase and V_TH to shift under the gate lag effect.

In this study, we investigated enhance mode (E-mode) p-GaN/AlGaN/GaN high-electron-mobility transistors (HEMTs) with an Al_0.5GaN etch-stop layer. Compared with an AlN etch-stop layer, the Al_0.5GaN etch-stop layer not only reduced lattice defects but engendered improved DC performance in the device; this can be attributed to the lattice match between the layer and substrate. The results revealed that the Al_0.5GaN etch-stop layer could reduce dislocation by 37.5% and improve device characteristics. Compared with the device with the AlN etch-stop layer, the p-GaN HEMT with the Al_0.5GaN etch-stop layer achieved a higher drain current on/off ratio (2.47 × 10⁷), a lower gate leakage current (1.55 × 10⁻⁵ A/mm), and a lower on-state resistance (21.65 Ω·mm); moreover, its dynamic R_ON value was reduced to 1.69 (from 2.26).

In this study, an AlGaN/GaN high-electron-mobility transistor (HEMT) was grown through metal organic chemical vapor deposition on a Qromis Substrate Technology (QST). The GaN on the QST device exhibited a superior heat dissipation performance to the GaN on a Si device because of the higher thermal conductivity of the QST substrate. Thermal imaging analysis indicated that the temperature variation of the GaN on the QST device was 4.5 °C and that of the GaN on the Si device was 9.2 °C at a drain-to-source current (I_DS) of 300 mA/mm following 50 s of operation. Compared with the GaN HEMT on the Si device, the GaN on the QST device exhibited a lower I_DS degradation at high temperatures (17.5% at 400 K). The QST substrate is suitable for employment in different temperature environments because of its high thermal stability.

A metal–insulator–semiconductor p-type GaN gate high-electron-mobility transistor (MIS-HEMT) with an Al₂O₃/AlN gate insulator layer deposited through atomic layer deposition was investigated. A favorable interface was observed between the selected insulator, atomic layer deposition–grown AlN, and GaN. A conventional p-type enhancement-mode GaN device without an Al₂O₃/AlN layer, known as a Schottky gate (SG) p-GaN HEMT, was also fabricated for comparison. Because of the presence of the Al₂O₃/AlN layer, the gate leakage and threshold voltage of the MIS-HEMT improved more than those of the SG-HEMT did. Additionally, a high turn-on voltage was obtained. The MIS-HEMT was shown to be reliable with a long lifetime. Hence, growing a high-quality Al₂O₃/AlN layer in an HEMT can help realize a high-performance enhancement-mode transistor with high stability, a large gate swing region, and high reliability.

Efficient heat removal through the substrate is required in high-power operation of AlGaN/GaN high-electron-mobility transistors (HEMTs). Thus, a SiC substrate was used due to its popularity. This article reports the electrical characteristics of normally off p-GaN gate AlGaN/GaN high-electron-mobility transistors (HEMTs) on a low-resistivity SiC substrate compared with the traditional Si substrate. The p-GaN HEMTs on the SiC substrate possess several advantages, including electrical characteristics and good qualities of epitaxial crystals, especially on temperature performance. Additionally, the price of the low-resistivity SiC substrate is three times lower than the ordinary SiC substrate.

In this study, a 50-nm Al_0.05Ga_0.95N back barrier (BB) layer was used in an AlGaN/GaN high-electron-mobility transistor between the two-dimensional electron gas channel and Fe-doped/C-doped buffer layers. This BB layer can reduce the channel layer. The BB layer is affected by doped carriers in the buffer layer and the conduction energy band between the channel and the buffer layers. The I_on/I_off ratio of the BB device was 4.66 × 10⁵, and the ratio for the device without BB was 1.91 × 10³. Lower leakage currents were obtained in the BB device because of the higher conduction energy band. The 0.25-μm gate length device with the BB exhibited a high current gain cutoff frequency of 24.4 GHz, and power gain cutoff frequency of 73 GHz.

A high threshold voltage (V_TH) normally off GaN MISHEMTs with a uniform threshold voltage distribution (V_TH = 4.25 ± 0.1 V at I_DS = 1 μA/mm) were demonstrated by the selective area ohmic regrowth technique together with an Si-rich LPCVD-SiN_x gate insulator. In the conventional GaN MOSFET structure, the carriers were induced by the inversion channel at a high positive gate voltage. However, this design sacrifices the channel mobility and reliability because a huge number of carriers are beneath the gate insulator directly during operation. In this study, a 3-nm ultra-thin Al_0.25Ga_0.75N barrier was adopted to provide a two-dimensional electron gas (2DEG) channel underneath the gate terminal and selective area MOCVD-regrowth layer to improve the ohmic contact resistivity. An Si-rich LPCVD-SiN_x gate insulator was employed to absorb trace oxygen contamination on the GaN surface and to improve the insulator/GaN interface quality. Based on the breakdown voltage, current density, and dynamic R_ON measured results, the proposed LPCVD-MISHEMT provides a potential candidate solution for switching power electronics.

The impact of gate metal on the leakage current and breakdown voltage of normally-off p-GaN gate high-electron-mobility-transistor (HEMT) with nickel (Ni) and zirconium (Zr) metals were studied and investigated. In this study, a Zr metal as a gate contact to p-GaN/AlGaN/GaN high mobility transistor (HEMT) was first applied to improve the hole accumulation at the high gate voltage region. In addition, the ZrN interface is also beneficial for improving the Schottky barrier with low nitrogen vacancy induced traps. The features of Zr are low work function (4.05 eV) and high melting point, which are two key parameters with p-GaN Schottky contact at reversed voltage. Therefore, Zr/p-GaN interface exhibits highly potential for GaN-based switching power device applications.