Sarabdeep Singh

This work demonstrates a charge plasma-based Gate-All-Around (GAA) nanowire field-effect transistor (FET) for high-sensitivity ammonia (NH₃) gas sensing. The proposed device utilizes palladium (Pd) and molybdenum (Mo) as gate metals, where Pd exhibits superior performance due to its strong catalytic interaction with NH₃ molecules. The sensing mechanism is governed by adsorption-induced work function modulation at the metal-gate interface, leading to measurable changes in threshold voltage (V_th), ON-state current (I_ON), and OFF-state current (I_OFF). A systematic work function variation from 50 to 200 meV reveals significant enhancement in sensing metrics, with the I_ON/I_OFF ratio improving from 2.6 × 10⁸ to 1.6 × 10¹¹ for Pd. Furthermore, channel length scaling and dielectric engineering demonstrate improved electrostatic control, with HfO₂ (~6.3%) achieving ~7.87% higher sensitivity compared to SiO₂ (~5.84%). The proposed architecture offers excellent switching behavior, low leakage, and strong sensitivity, making it a promising candidate for low-power, high-performance NH₃ sensing applications.

In this paper, a normally-OFF delta (δ)-doped aluminium gallium nitride (AlGaN)/Gallium nitride (GaN) high electron mobility transistor (HEMT) for high power applications is designed and simulated in Silvaco TCAD. Normally-OFF operation is achieved by using p-GaN cap layers where SiN_x is the dielectric which is placed between the gate electrode and p-GaN layer. Due to the delta (δ) doping, very low off current is achieved in the order of 10^–17 A and I_ON/I_OFF ratio in the order of 10¹², which is significant enough for high power switching applications. By the use of SiN_x dielectric layer, a decent threshold voltage of 2.16 V is observed. The proposed device is optimized by using various gate lengths and gate work functions.

This study examines the electrical performance characteristics of a ferroelectric vertical tunnel field‐effect transistor (TFET) with and without a source pocket (Si_0.5Ge_0.5). The incorporation of Germanium in the source of the TFET aims to enhance the on‐current. The Silvaco TCAD simulation tool is utilized to simulate the proposed structure. To improve device performance, a ferroelectric layer with a vertical length is employed in the gate of the TFET. When the ferroelectric layer partially controls the channel region, device characteristics, such as on‐current and subthreshold swing (SS) can be improved (i.e., I_ON = 15.21 × 10⁻⁵ A/μm, I_ON/I_OFF = 5.03 × 10⁹, and a minimum SS of 20.87 mV/decade at 300 K). This article studied a comparison between ferroelectric vertical TFETs and nonferroelectric vertical TFETs, as well as ferroelectric vertical TFETs with and without source pockets. The comparison is done on the basis of DC and RF parameters. Analysis of this comparison represents that ferroelectric vertical TFET with source pocket has improved characteristics.

This paper proposes a highly sensitive nanoscale label-free biosensor upon charge plasma based gate-all-around nanowire dopingless field effect transistor (GAA NW DL FET Biosensor) for the detection of biomolecules. The proposed sensor device structure employs charge plasma and dopingless approaches to eliminate the requirement for doping. The thermionic emission of FET structures increases the device’s current sensitivity (S_I) for various targeted biomolecules introduced through the nanocavity created at the source side/metal of the proposed biosensor. To test the significant sensing performance of the device proposed herein, the biomolecules streptavidin with a dielectric constant (K) of 2.1, 3-aminopropyltriethoxysilane (APTES) with a K value of 3.57, and protein with a K value of 8 are utilized. The proposed sensor resulted in drain current sensitivity as high as 1.4 of protein biomolecule. An extensive analysis was performed to evaluate the efficiency of the proposed sensor with process-related issues such as cavity length variations ranging from 21 nm to 3 nm and real-time related issues such as fill factor variations ranging from 20% to 100% and interface charges for the targeted biomolecules, and their sensitivity parameters were investigated, demonstrating the promising features of GAA NW DL FET biosensor as an ultrasensitive biosensor for clinical applications.

In this paper, the first-time-ever pressure sensor based on Hetero-stack L-shape TFET has been proposed and investigated through the SILVACO ATLAS TCAD tool. Owing to the hetero-stacking of Germanium material and Silicon material, an enhanced Ion and reduced sub-threshold swing is obtained by the proposed device leading to enhanced Pressure sensor sensitivity. The basic working principle of this proposed pressure sensor device is when pressure is applied to the diaphragm, the diaphragm bends which varies the metal-dielectric thickness of the oxide layer which further alters the electrical characteristics of the proposed pressure sensor. The diaphragm bendings considered in the study are 0, 1, 2, and 2.5 nm. The performance of the proposed pressure sensor device is analyzed through different electrical performance characteristics such as energy band diagrams, electric field, potential, Ion, sub-threshold swing, electron band-to-band tunneling rate, and various other analog/RF parameters at different diaphragm bendings. The effects of ITCs at various bendings are also analyzed to provide an in-depth effect of the factors that might affect the performance of the sensor. The proposed sensor design will be proven as a milestone in the array of sensors built for ultra-sensitive pressure sensing applications.

This paper examines the performance of a Gate-Engineered Gate-All-Around Charge Plasma Nanowire Field Effect Transistor (GAA-DMG-GS-CP NW-FET) and the implementation of a common source (CS) amplifier circuit. The proposed GAA-DMG-GS-CP NW-FET incorporates dual-material gate (DMG) and gate stack (GS) as gate engineering techniques and its analog/RF performance parameters are compared to those of the Gate-All-Around Single-Material Gate Charge Plasma Nanowire Field Effect Transistor (GAA-SMG-CP NW-FET) device. Both Gate-All-Around (GAA) devices are designed using the Silvaco TCAD tool. GAA structures have demonstrated good gate control because the gate holds the channel, which is an inherent advantage for both devices discussed herein. The charge plasma dopingless technique is used, in which the source and drain regions are formed using metal contacts and necessary work functions rather than doping. This dopingless technique eliminates the need for doping, reducing fluctuations caused by random dopants and lowering the device’s thermal budget. Gate engineering techniques such as DMG and GS significantly improved the current characteristics which played a crucial role in obtaining maximum gain for circuit designs. The lookup table (LUT) approach is used in the implementation of the CS amplifier circuit with the proposed device. The transient response of the circuit is analyzed with both the device structures where the gain achieved for the CS amplifier circuit using the proposed GAA-DMG-GS-CP NW-FET is 15.06 dB. The superior performance showcased by the proposed GAA-DMG-GS-CP NW-FET device with analog, RF and circuit analysis proves its strong candidature for future nanoscale and low-power applications.

A dopingless Cylindrical Nanowire Field Effect Transistor is proposed by implementing the charge plasma technique. The charge plasma technique helped in the necessary doping of the source/drain regions. The significance of using charge plasma based Nanowire FET for low-noise and higher sensing applications is investigated by analyzing the linearity parameters and compared with the Junctionless Nanowire FET. The proposed device is optimized as per the practical conditions by taking the interface trap charges into account. The interface trap charges are considered at the gate oxide-channel interface. The variation of interface trap charge (ITCs) density varies the device performance depending on the ITC polarity. The presence of ITCs can enhance device performance by tweaking the ITCs amplitude with positive polarity. The work function of the source/drain metal for the charge plasma technique is varied to get an optimized value. The higher value of source/drain metal degrades the device performance. The voltage interception point of the proposed device is greater than 5 times the actual value of the input signal. The drain current decreases drastically with the increase of source/drain work function independent of the gate bias.