Gang Chen

Loops constitute a small fraction of static code but dominate dynamic execution time and control overhead, posing significant challenges for energy-efficient mobile and embedded processors. This paper introduces Loop Semantic Recognition (LSR) , a microarchitectural technique that dynamically infers loop semantics to eliminate loop control overhead without requiring compiler support or ISA extensions. We further propose three complementary optimizations: Branch Strength Reduction (BSR), Hardware Loop Unrolling (HLU), and Stride Value Prediction (SVP), which progressively remove redundant control instructions, reduce pipeline pressure, and optimize loop execution. Evaluation on TSVC, PolyBench, NPB, and Swan benchmarks demonstrates that LSR and its extensions deliver substantial efficiency and energy benefits. HLU reduces committed instructions by up to 33.23% , while SVP lowers executed instructions by as much as 46.59% . LSR also reduces loop branch mispredictions and consistently decreases dynamic energy consumption, achieving an average processor-wide Energy-Delay Product (EDP) improvement of 8.36% across these four benchmark suites on a 2-wide baseline core. Scaling to a 4-wide core further raises the average EDP reduction to 15.39% . Additionally, LSR maintains consistent effectiveness across compiler optimization levels from -O1 to -O3 , confirming its robustness to code generation strategies. A complementary evaluation of SPEC CPU2017 shows an average EDP reduction of 2.93% , indicating that LSR optimization opportunities also exist in general-purpose workloads. These results are achieved with only 0.45 KB of total storage overhead, confirming LSR as a lightweight and practical solution for improving energy efficiency across mobile and embedded processor designs.

Pressure sensors, with their immense potential for detecting fine physiological activities and monitoring neurological disease‐related signals, face significant challenges, including the occurrence of signal artifacts during stretching and low comfort due to poor breathability. Here, a bioinspired interlocking hierarchical heterostructure (BIHH) is synergistically designed by anchoring a porous textile‐microstructured ionogel to stretchable laser‐induced graphene electrodes to simultaneously enhance strain insensitivity, pressure sensing performance, and wearable comfort. This modulus‐gradient heterogeneous mechanical network induces interfacial strain partitioning: tensile strain dissipates along porous Ecoflex frameworks, while the pressure‐sensitive domains are mechanically locked against deformation. Consequently, the sensor exhibits a mere 2% signal variation under 100% strain, maintaining consistent sensing capability even under severe stretching. Meanwhile, the hierarchical porous microstructure reconciles high‐performance iontronic pressure sensing with skin‐conformable breathability for array‐based touch and human physiological signal perception. Furthermore, by integrating artificial intelligence recognition algorithms, a five‐channel finger tapping assessment system achieves an accuracy of 97% in distinguishing different tapping patterns for the early auxiliary screening and rehabilitation of neurodegenerative diseases. This effective strategy opens a promising path for designing devices that reduce motion artifact interference while enhancing pressure sensing performance and comfort for on‐skin physiological activity monitoring.

As sequencing throughput grows faster than cost-effective secondary analysis can scale, genome analysis is increasingly dominated by irregular, memory-bound kernels that suit reconfigurable accelerators. Field-programmable gate arrays (FPGAs) offer customized datapaths and favorable energy efficiency for these workloads, yet published FPGA studies remain fragmented across pipeline stages, evaluation baselines, and deployment settings. This survey reviews FPGA accelerator publications along the standard genome analysis workflow from basecalling through variant calling and analyzes representative designs through a four-layer framework spanning control, compute, storage and communication, and data representation. We aggregate reported throughput and speedup by stage, discuss cross-study comparability, and examine toolchain compatibility across short, accurate long, and ultra-long reads and pipeline stages, contrasting vertically integrated systems such as DRAGEN with open, composable stacks. Surveyed designs achieve strong gains on filtering, indexing, alignment, and variant genotyping; recent work exploits high-bandwidth memory, learned indexes, neural basecalling co-design, and near-memory execution. Most academic prototypes remain single-stage PCIe kernels with narrow read-type coverage and difficult integration into tools such as GATK and BWA-MEM. We summarize four recurring challenges and outline directions in multi-stage coupling, near-memory and chiplet platforms, reusable kernel libraries and FPGA synthesis flows, and co-design for classical and learning-based accelerators beside portable sequencers.

Flexible spines are critical to the remarkable agility and speed of animals. Translating this biological advantage to quadruped robots presents a significant control challenge, particularly in coordinating the spine and limbs for maximal velocity. In this work, we utilize reinforcement learning (RL) to develop high-speed locomotion for a bioinspired mouse robot with a lateral flexible spine. The resulting controller achieves motor performance that demonstrably surpasses non-spined and model-based methods. More importantly, our analysis reveals the principles behind this performance: the emergence of two distinct motion templates. For high-speed walking, the robot learns a “whip-like” spinal oscillation to increase leg swing frequency, while for agile turning, it adopts a dynamic “bend-and-straighten” pattern. These findings demonstrate the capability of RL to not only generate high-performance controllers but also to produce emergent strategies that, upon analysis, reveal underlying principles of high-speed, spine-driven locomotion.

Three-dimensional (3D) scene reconstruction from the depth sensor is one of the fundamental research problems in many emerging applications such as robotic and virtual reality. However, due to the high computational complexity of 3D scene reconstruction processes, it is very difficult to achieve real-time implementation on low-power platforms. In this paper, we propose eTSDF, an energy- and memory-efficient hardware architecture for real-time truncated signed distance field (TSDF)-based 3D scene reconstruction system by accelerating the entire process stages on field-programmable gate array (FPGA) platform. To achieve memory-efficiency, we propose an adaptive TSDF integration solution, named eTSDF, which leverages the spatial locality of 3D volumetric representations and dynamically conducts integration process on sub-volumes, rather than on the entire volumes. In eTSDF, we design a set of dedicated, well optimized accelerators to achieve real-time implementations for the processes of adaptive sub-volume construction, coordinate transformation and TSDF integration. Evaluation results demonstrate that the eTSDF accelerator achieves up to 1.84× speedup and 101.23× energy efficiency improvement compared to the Intel i9-12900K CPU.

Robust depth estimation under dynamic and adverse lighting conditions is essential for robotic systems. Currently, depth foundation models, such as Depth Anything, achieve great success in ideal scenes but remain challenging under adverse imaging conditions such as extreme illumination and motion blur. These degradations corrupt the visual signals of frame cameras, weakening the discriminative features of frame-based depths across the spatial and temporal dimensions. Typically, existing approaches incorporate event cameras to leverage their high dynamic range and temporal resolution, aiming to compensate for corrupted frame features. However, such specialized fusion models are predominantly trained from scratch on domain-specific datasets, thereby failing to inherit the open-world knowledge and robust generalization inherent to foundation models. In this work, we propose ADAE, an event-guided spatiotemporal fusion framework for Depth Anything in degraded scenes. Our design is guided by two key insights: 1) Entropy-Aware Spatial Fusion. We adaptively merge frame-based and event-based features using an information entropy strategy to indicate illumination-induced degradation. 2) Motion-Guided Temporal Correction. We resort to the event-based motion cue to recalibrate ambiguous features in blurred regions. Under our unified framework, the two components are complementary to each other and jointly enhance Depth Anything under adverse imaging conditions. Extensive experiments have been performed to verify the superiority of the proposed method. Our code will be released upon acceptance.

In this work, we explore the technical feasibility of implementing end-to-end 3D object detection (3DOD) with surround-view fisheye camera system. Specifically, we first investigate the performance drop incurred when transferring classic pinhole-based 3D object detectors to fisheye imagery. To mitigate this, we then develop two methods that incorporate the unique geometry of fisheye images into mainstream detection frameworks: one based on the bird's-eye-view (BEV) paradigm, named FisheyeBEVDet, and the other on the query-based paradigm, named FisheyePETR. Both methods adopt spherical spatial representations to effectively capture fisheye geometry. In light of the lack of dedicated evaluation benchmarks, we release Fisheye3DOD, a new open dataset synthesized using CARLA and featuring both standard pinhole and fisheye camera arrays. Experiments on Fisheye3DOD show that our fisheye-compatible modeling improves accuracy by up to 6.2% over baseline methods.