Brett H. Meyer
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Previous Organizations / Institutes
The organizations / institutes from the scholar's other articles in the past ten years
Research Subjects
Brett H. Meyer has a total of 47 co-authors. Here are the top co-authors by number of shared publications:
- Warren J. Gross
McGill University
10 shared publications - James J. Clark
McGill University
5 shared publications - Seyyed Hasan Mozafari
Department of Electrical and Computer Engineering, McGill University, Montreal, Canada
5 shared publications - Hung-Yang Chang
McGill University, Montreal, PQ, Canada
2 shared publications - Kevin Skadron
University of Virginia
2 shared publications - Loren Lugosch
Department of Electrical and Computer Engineering McGill university
2 shared publications
Latest Publications
- 1 October 2026
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Embedded Systems Letters
- Vol. 18 (5) , 492-495
Zero-Shot NAS for TinyML Semantic Segmentation via Weight Sharing
Enhancing the efficiency of deep neural networks enables complex computer vision applications, such as semantic segmentation, to meet latency requirements on resource-limited embedded systems. By optimizing network parameters, computation overhead can be reduced, leading to lower inference latency. We present TinySegAdapt, a zero-shot architecture search framework for deploying semantic segmentation networks on the ultra-low-power TinyML device. TinySegAdapt compresses networks through parameter-tuning-based architecture search, achieving 2.75 percentage points higher mIoU and 34.2% lower latency compared with filter pruning method. We perform accuracy measurement using a pretrained network and weight sharing, rather than accuracy proxies, yielding a 1.30 pp mIoU improvement. Moreover, TinySegAdapt accelerates the search process by 81.3% through evaluating models on a subset of the validation set without fine-tuning. TinySegAdapt finds competitive designs in just 36.5 hours to discover a variant that is 2.2× faster network on TinyML hardware with a 1.49 percentage point mIoU drop on the PASCAL VOC 2012 dataset.
- 1 October 2026
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Embedded Systems Letters
- Vol. 18 (5) , 492-495
Zero-Shot NAS for TinyML Semantic Segmentation via Weight Sharing
Enhancing the efficiency of deep neural networks enables complex computer vision applications, such as semantic segmentation, to meet latency requirements on resource-limited embedded systems. By optimizing network parameters, computation overhead can be reduced, leading to lower inference latency. We present TinySegAdapt, a zero-shot architecture search framework for deploying semantic segmentation networks on the ultra-low-power TinyML device. TinySegAdapt compresses networks through parameter-tuning-based architecture search, achieving 2.75 percentage points higher mIoU and 34.2% lower latency compared with filter pruning method. We perform accuracy measurement using a pretrained network and weight sharing, rather than accuracy proxies, yielding a 1.30 pp mIoU improvement. Moreover, TinySegAdapt accelerates the search process by 81.3% through evaluating models on a subset of the validation set without fine-tuning. TinySegAdapt finds competitive designs in just 36.5 hours to discover a variant that is 2.2× faster network on TinyML hardware with a 1.49 percentage point mIoU drop on the PASCAL VOC 2012 dataset.
- Open Access
- 5 July 2026
- Published by Association for Computing Machinery (ACM)
- p. 1257-1261
LLM-Assisted Repository-Level Generation with Structured Spec-Driven Engineering
State-of-the-art Large Language Models (LLMs) excel in code generation at the function level. However, the output quality significantly declines when scaling to repository-level systems. Current workflows relying only on natural language prompts suffer from inherent ambiguity and a lack of verifiability. To address this, we propose structured spec-driven engineering (SSDE), a paradigm that leverages structured artifacts to guide LLM generation. We argue that structured specifications as LLM inputs make high-quality, repository-level code generation a tangible goal, while at the same time offering superior verifiability, leading to significant potential for improvement. We first investigate the feasibility of this vision through a pilot study generating Model-View-Controller (MVC) business logic for three software systems using five LLMs, and then highlight the potential, challenges, and future roadmap for SSDE.
- 5 July 2026
- Published by Association for Computing Machinery (ACM)
- p. 1257-1261
Open AccessLLM-Assisted Repository-Level Generation with Structured Spec-Driven Engineering
State-of-the-art Large Language Models (LLMs) excel in code generation at the function level. However, the output quality significantly declines when scaling to repository-level systems. Current workflows relying only on natural language prompts suffer from inherent ambiguity and a lack of verifiability. To address this, we propose structured spec-driven engineering (SSDE), a paradigm that leverages structured artifacts to guide LLM generation. We argue that structured specifications as LLM inputs make high-quality, repository-level code generation a tangible goal, while at the same time offering superior verifiability, leading to significant potential for improvement. We first investigate the feasibility of this vision through a pilot study generating Model-View-Controller (MVC) business logic for three software systems using five LLMs, and then highlight the potential, challenges, and future roadmap for SSDE.
- Open Access
- 25 June 2026
- Published by Association for Computing Machinery (ACM)
- p. 3486-3507
Hidden Beyond the Gender Binary: Pitch-Based Insights into Bias Mitigation for Keyword Spotting
- 25 June 2026
- Published by Association for Computing Machinery (ACM)
- p. 3486-3507
Open AccessHidden Beyond the Gender Binary: Pitch-Based Insights into Bias Mitigation for Keyword Spotting
- Open Access
- 14 May 2026
- Published by Association for Computing Machinery (ACM) in ACM Transactions on Embedded Computing Systems
- Vol. 25 (3) , 1-30
Latency-Aware Pruning and Quantization of Self-Supervised Speech Transformers for Edge Devices
The growing adoption of self-supervised learning transformers for speech (speech SSL) is constrained by their significant computational and memory demands, making deployment on resource-constrained edge devices challenging. We propose a latency-aware compression framework that integrates structured pruning and quantization to address these challenges. Guided by a latency model that considers the combined effects of pruning and quantization, our method dynamically identifies and removes less critical blocks while maintaining task performance, avoiding the inefficiencies of over-pruning and under-pruning seen in prior approaches. Unlike prior methods specialized in either post-training compression without fine-tuning data or in cases where fine-tuning data is available, our method is effective in both settings. Experimental results show that, in task-agnostic compression, our method achieves a 4.2× speedup on the Hikey970 edge development platform, outperforming previous task-agnostic pruning methods in most tasks, while requiring only 21–24 GPU hours—a 3× reduction compared to prior methods. Additionally, our method achieves a lower word error rate of 7.8% using task-specific pruning, while reducing computational overhead by approximately 19.4% in terms of GFLOPs compared to previous task-specific methods. Finally, our method consistently achieves higher accuracy than the state-of-the-art post-training compression approach across various latency speedup constraints, even without fine-tuning data.
- 14 May 2026
- Published by Association for Computing Machinery (ACM) in ACM Transactions on Embedded Computing Systems
- Vol. 25 (3) , 1-30
Open AccessLatency-Aware Pruning and Quantization of Self-Supervised Speech Transformers for Edge Devices
The growing adoption of self-supervised learning transformers for speech (speech SSL) is constrained by their significant computational and memory demands, making deployment on resource-constrained edge devices challenging. We propose a latency-aware compression framework that integrates structured pruning and quantization to address these challenges. Guided by a latency model that considers the combined effects of pruning and quantization, our method dynamically identifies and removes less critical blocks while maintaining task performance, avoiding the inefficiencies of over-pruning and under-pruning seen in prior approaches. Unlike prior methods specialized in either post-training compression without fine-tuning data or in cases where fine-tuning data is available, our method is effective in both settings. Experimental results show that, in task-agnostic compression, our method achieves a 4.2× speedup on the Hikey970 edge development platform, outperforming previous task-agnostic pruning methods in most tasks, while requiring only 21–24 GPU hours—a 3× reduction compared to prior methods. Additionally, our method achieves a lower word error rate of 7.8% using task-specific pruning, while reducing computational overhead by approximately 19.4% in terms of GFLOPs compared to previous task-specific methods. Finally, our method consistently achieves higher accuracy than the state-of-the-art post-training compression approach across various latency speedup constraints, even without fine-tuning data.
- 1 September 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Embedded Systems Letters
- Vol. 18 (3) , 168-172
Low-Power Face Recognition Using Joint Optical and Electronic Deep Neural Networks
Power and energy constraints limit the implementation of deep face recognition algorithms on edge devices. To address this issue, we propose an electro-optic hybrid system, with an always-on optical neural network that continuously monitors faces in a given environment and activates deep face recognition when a face is detected. We adapt the system for a scenario similar to a smart door lock application, involving center-aligned, randomly appearing faces. Tested on the Labeled Faces in the Wild dataset, the proposed system achieves 95.8% accuracy with 16 features extracted from face images by principal components analysis and enables a remarkable 33.2% reduction in power usage compared to the same neural network on digital processors.
- 1 September 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Embedded Systems Letters
- Vol. 18 (3) , 168-172
Low-Power Face Recognition Using Joint Optical and Electronic Deep Neural Networks
Power and energy constraints limit the implementation of deep face recognition algorithms on edge devices. To address this issue, we propose an electro-optic hybrid system, with an always-on optical neural network that continuously monitors faces in a given environment and activates deep face recognition when a face is detected. We adapt the system for a scenario similar to a smart door lock application, involving center-aligned, randomly appearing faces. Tested on the Labeled Faces in the Wild dataset, the proposed system achieves 95.8% accuracy with 16 features extracted from face images by principal components analysis and enables a remarkable 33.2% reduction in power usage compared to the same neural network on digital processors.
- Open Access
- 5 June 2023
- Published by Association for Computing Machinery (ACM)
- p. 455-459
High-Throughput Edge Inference for BERT Models via Neural Architecture Search and Pipeline
There has been growing interest in improving the BERT inference throughput on resource-constrained edge devices for a satisfactory user experience. One methodology is to employ heterogeneous computing, which utilizes multiple processing elements to accelerate inference. Another methodology is to deploy Neural Architecture Search (NAS) to find optimal solutions in accuracy-throughput design space. In this paper, for the first time, we incorporate NAS with pipelining for BERT models. We show that performing NAS with pipelining achieves on average 53% higher throughput, compared to NAS with a homogeneous system. Additionally, we propose a NAS algorithm that incorporates hardware performance feedback to accelerate the NAS process. Our proposed NAS algorithm speeds up the search process by ~4x, and 5.5x on the design space of the BERT and CNNs, respectively. Also, by exploring the accuracy-throughput design space of BERT models, we demonstrate that performing pipelining then NAS (Pipeline-then-NAS) can lead to solutions with up to 9x higher inference throughput, compared to running homogeneous inference on the BERT-base model, with only a 1.3% decrease in accuracy.
- 5 June 2023
- Published by Association for Computing Machinery (ACM)
- p. 455-459
Open AccessHigh-Throughput Edge Inference for BERT Models via Neural Architecture Search and Pipeline
There has been growing interest in improving the BERT inference throughput on resource-constrained edge devices for a satisfactory user experience. One methodology is to employ heterogeneous computing, which utilizes multiple processing elements to accelerate inference. Another methodology is to deploy Neural Architecture Search (NAS) to find optimal solutions in accuracy-throughput design space. In this paper, for the first time, we incorporate NAS with pipelining for BERT models. We show that performing NAS with pipelining achieves on average 53% higher throughput, compared to NAS with a homogeneous system. Additionally, we propose a NAS algorithm that incorporates hardware performance feedback to accelerate the NAS process. Our proposed NAS algorithm speeds up the search process by ~4x, and 5.5x on the design space of the BERT and CNNs, respectively. Also, by exploring the accuracy-throughput design space of BERT models, we demonstrate that performing pipelining then NAS (Pipeline-then-NAS) can lead to solutions with up to 9x higher inference throughput, compared to running homogeneous inference on the BERT-base model, with only a 1.3% decrease in accuracy.
- Open Access
- 23 April 2023
- Published by Elsevier in Energy and AI
- Vol. 14
A data-driven framework for medium-term electric vehicle charging demand forecasting
- 23 April 2023
- Published by Elsevier in Energy and AI
- Vol. 14
Open AccessA data-driven framework for medium-term electric vehicle charging demand forecasting
- Open Access
SSS3D: Fast Neural Architecture Search For Efficient Three-Dimensional Semantic Segmentation
We present SSS3D, a fast multi-objective NAS framework designed to find computationally efficient 3D semantic scene segmentation networks. It uses RandLA-Net, an off-the-shelf point-based network, as a super-network to enable weight sharing and reduce search time by 99.67% for single-stage searches. SSS3D has a complex search space composed of sampling and architectural parameters that can form 2.88 * 10^17 possible networks. To further reduce search time, SSS3D splits the complete search space and introduces a two-stage search that finds optimal subnetworks in 54% of the time required by single-stage searches.
Open AccessSSS3D: Fast Neural Architecture Search For Efficient Three-Dimensional Semantic Segmentation
We present SSS3D, a fast multi-objective NAS framework designed to find computationally efficient 3D semantic scene segmentation networks. It uses RandLA-Net, an off-the-shelf point-based network, as a super-network to enable weight sharing and reduce search time by 99.67% for single-stage searches. SSS3D has a complex search space composed of sampling and architectural parameters that can form 2.88 * 10^17 possible networks. To further reduce search time, SSS3D splits the complete search space and introduces a two-stage search that finds optimal subnetworks in 54% of the time required by single-stage searches.
- Open Access
FMAS: Fast Multi-Objective SuperNet Architecture Search for Semantic Segmentation
We present FMAS, a fast multi-objective neural architecture search framework for semantic segmentation. FMAS subsamples the structure and pre-trained parameters of DeepLabV3+, without fine-tuning, dramatically reducing training time during search. To further reduce candidate evaluation time, we use a subset of the validation dataset during the search. Only the final, Pareto non-dominated, candidates are ultimately fine-tuned using the complete training set. We evaluate FMAS by searching for models that effectively trade accuracy and computational cost on the PASCAL VOC 2012 dataset. FMAS finds competitive designs quickly, e.g., taking just 0.5 GPU days to discover a DeepLabV3+ variant that reduces FLOPs and parameters by 10$\%$ and 20$\%$ respectively, for less than 3$\%$ increased error. We also search on an edge device called GAP8 and use its latency as the metric. FMAS is capable of finding 2.2$\times$ faster network with 7.61$\%$ MIoU loss.
Open AccessFMAS: Fast Multi-Objective SuperNet Architecture Search for Semantic Segmentation
We present FMAS, a fast multi-objective neural architecture search framework for semantic segmentation. FMAS subsamples the structure and pre-trained parameters of DeepLabV3+, without fine-tuning, dramatically reducing training time during search. To further reduce candidate evaluation time, we use a subset of the validation dataset during the search. Only the final, Pareto non-dominated, candidates are ultimately fine-tuned using the complete training set. We evaluate FMAS by searching for models that effectively trade accuracy and computational cost on the PASCAL VOC 2012 dataset. FMAS finds competitive designs quickly, e.g., taking just 0.5 GPU days to discover a DeepLabV3+ variant that reduces FLOPs and parameters by 10$\%$ and 20$\%$ respectively, for less than 3$\%$ increased error. We also search on an edge device called GAP8 and use its latency as the metric. FMAS is capable of finding 2.2$\times$ faster network with 7.61$\%$ MIoU loss.
- Open Access
- 31 January 2023
- Published by Association for Computing Machinery (ACM) in ACM Transactions on Cyber-Physical Systems
- Vol. 7 (1) , 1-27
DT-DS: CAN Intrusion Detection with Decision Tree Ensembles
The controller area network (CAN) protocol, used in many modern vehicles for real-time inter-device communications, is known to have cybersecurity vulnerabilities, putting passengers at risk for data exfiltration and control system sabotage. To address this issue, researchers have proposed to utilize security measures based on cryptography and message authentication; unfortunately, such approaches are often too computationally expensive to be deployed in real time on CAN devices. Additionally, they have developed machine learning (ML) techniques to detect anomalies in CAN traffic and thereby prevent attacks. The main disadvantage of existing ML-based techniques is that they either depend on additional computational hardware or they heuristically assume that all communication anomalies are malicious. In this article, we show that tree-based learning ensembles outperform anomaly-based techniques like AutoRegressive Integrated Moving Average (ARIMA) and Z-Score when used to detect attacks that result in increased bus utilization. We evaluated the detection capacity of three tree-based ensembles, Adaboost, gradient boosting, and random forests, and collectively refer to these as DT-DS. We conclude that the decision tree ensemble with Adaboost performs best with an area under curve (AUC) score of 0.999, closely followed by gradient boosting and random forests with 0.997 and 0.991 AUC scores, respectively, when trained using message profiles. We observe that with an increase in the observation window, the DT-DS models present an average AUC score of 0.999, and offer a nearly perfect detection of attacks, at the cost of increased latency in detection of attacked messages. We evaluate the performance of the IDS for Aeronautical Radio, Incorporated– (ARINC) encoded CAN communication traffic in avionic systems, generated using an aerospace testbench, ARINC-825TBv2. The IDS has been evaluated against the active attacks of a state-of-the-art predictive attacker model. Additionally, we observed that the performance of IDS approaches such as ARIMA and Z-Score degrade considerably with a decrease in the size of the observation time window. In contrast, the performance of DT-DS models is consistent, with only an average drop of 0.005 in the AUC score.
- 31 January 2023
- Published by Association for Computing Machinery (ACM) in ACM Transactions on Cyber-Physical Systems
- Vol. 7 (1) , 1-27
Open AccessDT-DS: CAN Intrusion Detection with Decision Tree Ensembles
The controller area network (CAN) protocol, used in many modern vehicles for real-time inter-device communications, is known to have cybersecurity vulnerabilities, putting passengers at risk for data exfiltration and control system sabotage. To address this issue, researchers have proposed to utilize security measures based on cryptography and message authentication; unfortunately, such approaches are often too computationally expensive to be deployed in real time on CAN devices. Additionally, they have developed machine learning (ML) techniques to detect anomalies in CAN traffic and thereby prevent attacks. The main disadvantage of existing ML-based techniques is that they either depend on additional computational hardware or they heuristically assume that all communication anomalies are malicious. In this article, we show that tree-based learning ensembles outperform anomaly-based techniques like AutoRegressive Integrated Moving Average (ARIMA) and Z-Score when used to detect attacks that result in increased bus utilization. We evaluated the detection capacity of three tree-based ensembles, Adaboost, gradient boosting, and random forests, and collectively refer to these as DT-DS. We conclude that the decision tree ensemble with Adaboost performs best with an area under curve (AUC) score of 0.999, closely followed by gradient boosting and random forests with 0.997 and 0.991 AUC scores, respectively, when trained using message profiles. We observe that with an increase in the observation window, the DT-DS models present an average AUC score of 0.999, and offer a nearly perfect detection of attacks, at the cost of increased latency in detection of attacked messages. We evaluate the performance of the IDS for Aeronautical Radio, Incorporated– (ARINC) encoded CAN communication traffic in avionic systems, generated using an aerospace testbench, ARINC-825TBv2. The IDS has been evaluated against the active attacks of a state-of-the-art predictive attacker model. Additionally, we observed that the performance of IDS approaches such as ARIMA and Z-Score degrade considerably with a decrease in the size of the observation time window. In contrast, the performance of DT-DS models is consistent, with only an average drop of 0.005 in the AUC score.