André Bernardus Joseph Kokkeler

This letter presents a measurement and Cramér-Rao lower bound (CRLB) characterization-based performance analysis of a distributed sub-band full-duplex (SBFD) integrated sensing and communication (ISAC) system, benchmarked against in-band full-duplex (IBFD), interleaved subcarrier allocation, and multi-band systems. Results highlight that SBFD ISAC enables efficient sensing-communication coexistence, achieving a bit error rate of 3.63 × 10⁻³ under non-line-of-sight conditions and a median velocity root mean squared error of 0.298 m/s for indoor human targets compared to 5.4 m/s for IBFD. CRLB analysis shows that IBFD ISAC requires 20.04% more transmit power and sufficient interference cancellation to be competitive.

Approximate Computing has emerged as a viable solution to resource-efficient computing in error-resilient applications by relaxing constraints on accuracy for significant gains in terms of power, performance, and area. Among existing approximation techniques, the self-healing methodologies have shown a promising quality-efficiency balance by canceling out the overall effect of computational errors. However, they rely on highly parallel implementations for error cancellation. In our prior work (MACISH), we proposed an Internal-Self-Healing (ISH) methodology that applies approximations in the recursive multiplication stage and leverages the accumulation stage for error cancellation, eliminating the need for paired parallel modules required by traditional self-healing approaches. ASIC-based digital designs proposed by MACISH demonstrated superior quality-efficiency results for the radio astronomy application. However, the architectural differences limit the direct mapping of ASIC-based optimized designs to FPGAs. Therefore, this article addresses the gap by designing the FPGA-based Pareto-optimal 4-bit and 8-bit recursive approximate multipliers using ISH methodology. The proposed Design Space Exploration (DSE) strategy manages the vast 8-bit design space by deriving the candidate designs from 4-bit Pareto-optimal multipliers, reducing the search complexity while preserving the performance. The proposed designs achieve up to 12% and 33.6% better power and energy efficiency, respectively, compared to accurate 8-bit multipliers and up to 30× improved output quality at a similar area. The design flow is automated using the ’Approxy’ Tool, which has also been developed as part of this work. For the radio astronomy correlation application, these designs achieved comparable (and acceptable) output quality with respect to the state-of-the-art. For Deep Learning (DL) workloads, the proposed 8-bit designs matched or even exceeded the baseline accuracy for binary and multiclass classification problems.

Integrated Sensing and Communication (ISAC) is a key enabler in 6G networks, where sensing and communication capabilities are designed to complement and enhance each other. One of the main challenges in ISAC lies in resource allocation, which becomes computationally demanding in dynamic environments requiring real-time adaptation. In this paper, we propose a Deep Reinforcement Learning (DRL)-based approach for dynamic beamforming and power allocation in ISAC systems. The DRL agent interacts with the environment and learns optimal strategies through trial and error, guided by predefined rewards. Simulation results show that the DRL-based solution converges within 2000 episodes and achieves up to 80\% of the spectral efficiency of a semidefinite relaxation (SDR) benchmark. More importantly, it offers a significant improvement in runtime performance, achieving decision times of around 20 ms compared to 4500 ms for the SDR method. Furthermore, compared with a Deep Q-Network (DQN) benchmark employing discrete beamforming, the proposed approach achieves approximately 30\% higher sum-rate with comparable runtime. These results highlight the potential of DRL for enabling real-time, high-performance ISAC in dynamic scenarios.

The integration of sensing and communication capabilities within a single platform is a significant advantage of sixth-generation (6G) communication systems. Multi-beam technology offers an efficient front-end solution for joint communication and sensing (JCAS) at the base station (BS), enabling simultaneous communication with multiple users and sensing multiple targets through analog beamforming. This work introduces a scenario-based tiling array design methodology for a JCAS BS, employing a tiled planar array (TPA) that emphasizes cost-effectiveness, modularity, and scalability. We adopt a low-complexity channel-matching method to optimize the tiles by leveraging self- and cross-correlations of communication and sensing channels. Key performance metrics for this design include the signal-to-interference-plus-noise ratio (SINR) for both communication and sensing tasks. Numerical results indicate that the optimum design of TPAs for JCAS necessitates a proper knowledge of the scenario and environment in which the apertures will be employed. In conflicting scenarios, such as communication operates in non-line-of-sight (NLOS) conditions while sensing relies on line-of-sight (LOS), the scatterers that enable communication also appear as clutter to the sensing function. For example, if NLoS communication clusters fully obstruct the radar targets, the JCAS system can suffer up to a 10 dB drop in sensing SINR; however, these clusters can benefit communication, when the scatterers are positioned in regions of higher aperture gain.

The ever-increasing computational load and shrinking power budget have accentuated the need for energy-efficient operation of edge devices. In this article, a combination of static CMOS logic and hybrid pass transistor logic with Static CMOS output (HPSC), which has no floating or weak nodes and is thus as robust to noise as static CMOS logic, is used for designing toolchain-compatible super- $\text {V}_{\text {th}}$ standard cells. Optimized HPSC variants of a 2/3-input XOR cell, a 2/3-input XNR cell, a half adder cell, a full adder cell, and two variants of a 1-bit multiply–accumulate combinational cell are presented in a commercial 65nm low-power CMOS technology. Measurements of test structures based on ring oscillators and dummy path techniques show an average frequency and average energy-delay product improvement of up to 30.3% and 32.5%, respectively, at typical conditions. The proposed cells’ superior performance compared to the commercially available standard cells is also highlighted in terms of propagation delay, leakage, and dynamic power consumption. This shows a promising approach for foundries or other commercial entities to improve digital design performance to about half a technology node at no additional cost.

Large scale Radio Telescopes for Radio Astronomy highly depend on the availability of large (digital) processing capacities for imaging. Estimates concerning power efficiency for future Radio Telescopes lead to anticipated power consumption numbers beyond feasibility. To reduce the power budget, the use of approximate multipliers within the correlator is explored. A baseband equivalent executable model of a radio synthesis telescope is constructed to assess the effects of approximate multipliers. Besides ideal multipliers with floating point accuracy, the use of accurate 8-bit multipliers and 4 different types of approximate multipliers is explored. For each of these multipliers, the energy efficiency of an individual multiplier is known and used to determine the energy efficiency improvement of a correlator when using approximate multipliers. The effects of approximation are quantified by 3 metrics (Signal-to-Noise-Ratio (SNR), Spurious-Free-Dynamic-Range (SFDR) and Root-Mean-Square (RMS) level) derived from maps constructed by the executable model based on an empty sky with only a single point source. This is considered to be the worst case scenario. For illustration purposes, a more realistic input is processed by the model as well. The metrics have been determined based on different SNR levels at the input of each antenna element. For input SNR levels up to 10 dB, all types of approximate multipliers used in this paper can be exploited to improve energy efficiency of correlators, leading to a maximum energy reduction of 19 %. For input SNR values up to 30 dB an energy improvement up to 12 % can be achieved. These percentages are based on implementations in a 40nm low power IC technology at 1 GHz.

Over-the-air (OTA) testing and electromagnetic compatibility (EMC) measurements are widely performed in classical reverberation chambers. A less-known reverberation chamber, yet a considerably efficient environment for generating multipath conditions, is the vibrating intrinsic reverberation chamber (VIRC). This article thoroughly investigates the radio propagation channel inside the VIRC. The specific channels studied are narrowband single-input single-output (SISO) systems operating in the frequency range from 670-2740 MHz. A relevant application is OTA testing wireless baseband algorithms or modems for wireless sensor networks, specifically low-power wide-area networks such as Narrowband-IoT (NB-IoT), Long Range (LoRa) and Ultra-Narrowband (UNB). The focus is on the first- and second-order temporal and spectral channel characteristics: coherence time, Doppler spectrum, Doppler spread, frequency autocovariance function, coherence bandwidth, rejection rate of chi-squared goodness-of-fit test for Rician distribution, Rician K -factor, and channel gain. Besides the impact of the frequency of operation, the investigation considers the effect of the rotational speed of the VIRC motors, two loading conditions, on the channel characteristics. An analysis of the measurement results shows that the stirring efficiency degrades while the coherence time increases at slow rotational speeds, with loading, and/or at low frequencies. Moreover, empirical models closely fitting the behavior of various investigated characteristics are proposed, for which we provide foundational physical interpretations. A further investigation is carried out to demonstrate the generality and briefly illustrate the potential usability of these models for both EMC and OTA testing.

In this paper, a methodology for developing a human walking model adapted to the individual measured by radar was proposed. The fundamental parameters used in the model are the gait parameters and physical dimensions. Empirical validation of the proposed methodology is undertaken, involving the acquisition of data using a 77-GHz FMCW radar. The data is collected from three distinct individuals walking five different trajectories with respect to the radar. Moreover, the gait parameter estimation accuracy is evaluated for the different walking trajectories of the target. The studied gait parameters are speed, step length, and step frequency. These could be estimated with mean errors up to 0.077 m/s, 9.3 cm, and 0.128 Hz for all trajectories, respectively. Nevertheless, these errors diminish to 0.022 m/s, 2.2 cm and 0.03 Hz, respectively when the targets walk in a straight trajectory aligned with the radar beam. Moreover, the feasibility of estimating body part dimensions directly from the radar data is investigated. It was found that only the total human height could be directly estimated using the employed hardware. Except for the tallest participant of 2.01 m, the height could be estimated with a mean absolute error up to 10.9 cm. Enhanced hardware configurations or the integration of machine learning techniques may improve the accuracy of body part dimension estimations.