Luu The Vinh
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Research Subjects
Luu The Vinh has a total of 8 co-authors. Here are the top co-authors by number of shared publications:
- Nguyen Dang Chien
Dalat University
4 shared publications Chun-Hsing Shih
Department of Electrical Engineering, National Chi Nan University, Nantou 54561, Taiwan
3 shared publicationsNguyen Van Kien
Department of Electrical Engineering, National Chi Nan University, Nantou 54561, Taiwan
2 shared publicationsJui-Kai Hsia
Department of Electrical Engineering, National Chi Nan University, Nantou 54561, Taiwan
1 shared publicationNguyen Dang Chien
1 shared publication- Nguyen Ngoc Son
Faculty of Electronics Technology, Industrial University of Ho Chi Minh City, Viet Nam
1 shared publication
Latest Publications
- 11 August 2016
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1-4
Different scalabilities of N- and P-type tunnel field-effect transistors with Si/SiGe heterojunctions
The dimensional scaling of tunnel field-effect transistors (TFETs) is an indispensable issue to make them competitive with traditional metal-oxide-semiconductor field-effect transistors (MOSFETs). This paper elucidates the scalabilities of very potential TFETs utilizing Si/SiGe heterojunctions operated in n- and p-type operation modes. Although using the Si/SiGe heterostructures helps to improve the on-currents of both n- and p-type TFETs, its assistance in scaling the device dimension is essentially different between the n- and p-type modes. The asymmetric band-offset of Si/SiGe heterojunctions associated with the asymmetric properties of tunneling in n- and p-type TFETs are responsible for the scalability difference. With a high scalability down to sub-10 nm, the graded Si/SiGe heterojunction p-type TFET exhibits a feasible candidate for low-power and highly-scaled integrated circuits.
- 11 August 2016
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1-4
Different scalabilities of N- and P-type tunnel field-effect transistors with Si/SiGe heterojunctions
The dimensional scaling of tunnel field-effect transistors (TFETs) is an indispensable issue to make them competitive with traditional metal-oxide-semiconductor field-effect transistors (MOSFETs). This paper elucidates the scalabilities of very potential TFETs utilizing Si/SiGe heterojunctions operated in n- and p-type operation modes. Although using the Si/SiGe heterostructures helps to improve the on-currents of both n- and p-type TFETs, its assistance in scaling the device dimension is essentially different between the n- and p-type modes. The asymmetric band-offset of Si/SiGe heterojunctions associated with the asymmetric properties of tunneling in n- and p-type TFETs are responsible for the scalability difference. With a high scalability down to sub-10 nm, the graded Si/SiGe heterojunction p-type TFET exhibits a feasible candidate for low-power and highly-scaled integrated circuits.
- 27 February 2015
- Published by Publishing House for Science and Technology, Vietnam Academy of Science and Technology (Publications) in Journal of Science and Technology
- Vol. 53 (1) , 85
EFFECTS OF SOURCE DOPING PROFILE ON DEVICE CHARACTERISTICS OF LATERAL AND VERTICAL TUNNEL FIELD-EFFECT TRANSISTORS
EFFECTS OF SOURCE DOPING PROFILE ON DEVICE CHARACTERISTICS OF LATERAL AND VERTICAL TUNNEL FIELD-EFFECT TRANSISTORS
- 27 February 2015
- Published by Publishing House for Science and Technology, Vietnam Academy of Science and Technology (Publications) in Journal of Science and Technology
- Vol. 53 (1) , 85
EFFECTS OF SOURCE DOPING PROFILE ON DEVICE CHARACTERISTICS OF LATERAL AND VERTICAL TUNNEL FIELD-EFFECT TRANSISTORS
EFFECTS OF SOURCE DOPING PROFILE ON DEVICE CHARACTERISTICS OF LATERAL AND VERTICAL TUNNEL FIELD-EFFECT TRANSISTORS
- 4 September 2013
- Published by AIP Publishing in Journal of Applied Physics
- Vol. 114 (9) , 094507
Drive current enhancement in tunnel field-effect transistors by graded heterojunction approach
The heterostructure technique has recently demonstrated an excellent solution to resolve the trade-off between on- and off-state currents in tunnel field-effect transistors (TFETs). This paper shows the weakness of abrupt heterojunctions and explores the physics of drive current enhancement as well as generalizes the proposed graded heterojunction approach in both n-type and p-type TFETs. It is shown that the presence of thermal emission barriers formed by abrupt band offsets is the physical reason of the on-current lowering observed in abrupt heterojunction TFETs. By employing graded heterojunctions in TFETs, the thermal emission barriers for electrons and holes are completely eliminated to narrow the tunnel widths in n-type and p-type TFETs, respectively. With the significant improvement in on-current, this novel approach of graded heterojunctions provides an effective technique for enhancing the drive current in heterostructure-based TFET devices.
- 4 September 2013
- Published by AIP Publishing in Journal of Applied Physics
- Vol. 114 (9) , 094507
Drive current enhancement in tunnel field-effect transistors by graded heterojunction approach
The heterostructure technique has recently demonstrated an excellent solution to resolve the trade-off between on- and off-state currents in tunnel field-effect transistors (TFETs). This paper shows the weakness of abrupt heterojunctions and explores the physics of drive current enhancement as well as generalizes the proposed graded heterojunction approach in both n-type and p-type TFETs. It is shown that the presence of thermal emission barriers formed by abrupt band offsets is the physical reason of the on-current lowering observed in abrupt heterojunction TFETs. By employing graded heterojunctions in TFETs, the thermal emission barriers for electrons and holes are completely eliminated to narrow the tunnel widths in n-type and p-type TFETs, respectively. With the significant improvement in on-current, this novel approach of graded heterojunctions provides an effective technique for enhancing the drive current in heterostructure-based TFET devices.
- 1 May 2013
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 23813555,p. 73-76
Quantum confinement effect in strained-Si1−xGex double-gate tunnel field-effect transistors
The energy bandgap is a key factor to determine the tunneling current in tunnel field-effect transistors (TFETs). This paper numerically investigates the effect of quantum confinement in the double-gate TFETs by evaluating the effective energy-band bandgap of the ultra-thin strained-Si 1-x Ge x body. The band-offset caused by the quantum confinement effect is rapidly increased with increasing the Ge mole fraction because the body thickness must be decreased to retain the same compressive strain of Si 1-x Ge x . A medium Ge more fraction of strained-Si 1-x Ge x is favorable to optimize the device performance in the strained-Si 1-x Ge x double-gate TFETs.
- 1 May 2013
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 23813555,p. 73-76
Quantum confinement effect in strained-Si1−xGex double-gate tunnel field-effect transistors
The energy bandgap is a key factor to determine the tunneling current in tunnel field-effect transistors (TFETs). This paper numerically investigates the effect of quantum confinement in the double-gate TFETs by evaluating the effective energy-band bandgap of the ultra-thin strained-Si 1-x Ge x body. The band-offset caused by the quantum confinement effect is rapidly increased with increasing the Ge mole fraction because the body thickness must be decreased to retain the same compressive strain of Si 1-x Ge x . A medium Ge more fraction of strained-Si 1-x Ge x is favorable to optimize the device performance in the strained-Si 1-x Ge x double-gate TFETs.
- 1 February 2013
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 65 66, 67-70
Proper determination of tunnel model parameters for indirect band-to-band tunneling in compressively strained Si1−xGex TFETs
Tunnel field-effect transistor (TFET) has served as one of the most attractive candidates for use in future low-power integrated circuits. To explore the current-voltage characteristics of TFET devices, the Kane's tunnel model has been widely used in numerical simulations and physical models to predict the tunneling current produced in the TFETs. This study examines the proper calculations of Kane's model parameters appropriate for the indirect band-to-band tunneling generated in compressively strained Si 1-x Ge x channel on Si-substrate. The calculated parameters were verified with the measured results from experimental TFETs. Good agreements are confirmed between the numerical and measured data without any fitting factors.
- 1 February 2013
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 65 66, 67-70
Proper determination of tunnel model parameters for indirect band-to-band tunneling in compressively strained Si1−xGex TFETs
Tunnel field-effect transistor (TFET) has served as one of the most attractive candidates for use in future low-power integrated circuits. To explore the current-voltage characteristics of TFET devices, the Kane's tunnel model has been widely used in numerical simulations and physical models to predict the tunneling current produced in the TFETs. This study examines the proper calculations of Kane's model parameters appropriate for the indirect band-to-band tunneling generated in compressively strained Si 1-x Ge x channel on Si-substrate. The calculated parameters were verified with the measured results from experimental TFETs. Good agreements are confirmed between the numerical and measured data without any fitting factors.