Bhanu Teja Vankayalapati

The dynamic high-temperature operating lifetime (DHTOL) test is used to validate the product level robustness of a device in interaction with other system components and various product operating modes. This article presents a DHTOL-based test methodology for investigating the switching reliability of gallium nitride high electron mobility transistors in applications involving large drain-to-source voltage ringing. To conduct this study, a highly scalable, modular and reconfigurable test bench architecture is presented that can simultaneously test multiple devices under realistic stress conditions. The test vehicles are designed to replicate the switching stress typical of a quasi-resonant flyback converter while optimizing overall power consumption. In addition, the setup includes features for inline dynamic $R_{DS,\text{ON}}$ monitoring, enabling user-friendly tracking of the changes of this key parameter throughout the test duration. This real-time monitoring capability is highly beneficial for understanding and gaining valuable insights into the evolution of the devices’ $R_{DS,\text{ON}}$ under continuous stress conditions. Using a prototype of the proposed test bench, multiple samples from three different device vendors are stressed under two distinct test conditions each. All tests are conducted over an intended duration of 1000 h and a detailed description of the results observed is also presented in this article.

This article presents a comprehensive study on gate leakage current characterization of silicon carbide (SiC) MOSFETs and the prediction of the device’s remaining useful lifetime (RUL) using machine learning (ML) methods. Recent studies in SiC MOSFETs reliability recognize gate leakage currents as an aging indicator. However, most measurements are confined to periodic measurements of one device type. This limitation raises concerns in SiC MOSFETs, particularly for safety-critical applications like aerospace and electric vehicles (EVs). To address this concern, this study proposes a functional circuit capable of measuring gate leakage current at 100 samples per second rate, facilitating the aging and failure characterization accurately. In addition, it showcases the effective application of practical ML methods for predicting device longevity. Experimental measurements across devices from different vendors consistently reveal declining gate leakage current and increasing threshold voltage with aging. Thanks to the high-resolution measurement capability, for the first time it is also shown that the gate leakage current surges from nanoampere levels to milliampere levels within 1–2 s at the end of the lifetime, signifying impending device failure. This time window provides a safe-stop opportunity that enables an additional protective action way before any fault-related current or voltage overshoots appear. Finally, through the application of a combination of gate leakage current measurements and practical ML methods, the accurate prediction of the RUL of SiC MOSFETs is achieved.

This article puts forward a novel online method to measure the junction temperature ( $T_{j}$ ) of silicon carbide (SiC) mosfet s. In this method, the voltage spikes in the common source stray inductance are captured to obtain the turn- on and turn- off switching transients of SiC mosfet s. The switching transients contain useful information pertaining to the temperature and are used to extract the junction temperature. By measuring both turn- on and turn- off switching transients, the technique effectively addresses the impact of aging on the online junction temperature measurement procedure. The proposed method enables the measurement of junction temperature without high-bandwidth current sensors. In order to improve precision, this approach converts the measured voltage spikes into digital signals with specific pulse width, which can be measured by high-resolution capture module in the microcontroller with an error of less than 1 $^{\circ }$ C. Importantly, the proposed circuit has minimal impact on the normal operation of the converter and can be integrated into the gate driver integrated circuits (ICs). The effectiveness of this method is validated through experiments conducted on a double-pulse test setup and buck converter. The results confirm the practicality and viability of this approach.

Accurate control of junction temperature swing is crucial in DC power cycling tests for reliability assessments. In this work, a model based aging independent closed-loop junction temperature profile control method is proposed. Specifically, the temperature ramp rate and dwell time at the maximum junction temperature are controlled. The device's on-state resistance measurements are used to accurately estimate its junction temperature. A code and memory efficient technique is presented for mapping measured resistance to junction temperature. The proposed technique also considers the variation in aging related on-state resistance change. Specifically, SiC MOSFET's body-diode forward voltage drop ( $V_{f}$ ) at negative gate voltage and small current is used as an aging independent temperature sensitive electrical parameter (TSEP) to adjust the temperature reference to compensate for aging related shifts. The detailed algorithm, filter and controller design methods are presented in detail. The proposed algorithm is validated on a custom DC power cycling test bench.

AC power cycling tests allow the most realistic reliability assessment by applying close to real stress to the device or module under test to meet functional safety standards, which is highly critical for traction applications. This paper presents a comprehensive guideline and shares critical know-how to develop a 120 KVA AC power cycling test setup for high-power Silicon Carbide (SiC) modules. As of today, traction applications can not generate an early warning signal for drivers to replace critical components on time. For this purpose, the suitable precursors for all dominant failure mechanisms are discussed, and the corresponding condition monitoring tools are proposed to monitor the device aging on power converters. These condition monitoring tools are integrated into the built-in desaturation protection circuit of the electric vehicle (EV) gate driver for low-cost, practical implementation. The on-resistance of all twelve switches is monitored online as a temperature-sensitive electrical parameter (TSEP) to measure the junction temperature of the devices. To avoid heavy processing load in the microcontroller, the out-of-order equivalent time sampling technique is developed for data sampling, which leads to a measurement error of less than 1.5%. In addition, the design considerations regarding common mode noise and aging effect on DESAT protection are investigated, and experimental findings are presented.

Gate-oxide degradation is a concern in SiC MOSFETs especially in safety critical applications such as aerospace and electric vehicles (EV). To address this concern, this paper presents an accurate gate-oxide degradation monitoring solution based on the SiC devices’ transfer characteristics. Specifically, a plug-in circuit for gate driver is proposed to extract the transconductance ( g_m ) and threshold voltage ( V_th ) values from transfer characteristic. By using the threshold voltage as gate-oxide aging reference and transconductance as the junction temperature reference, the two precursors are combined to obtain a temperature and package degradation independent estimate of the gate-oxide health. High-temperature gate bias (HTGB) and DC power cycling tests are used to confirm g_m ’s sensitivity to gate-oxide degradation and insensitivity to package degradation in kelvin-sourced discrete SiC MOSFETs. A simple circuit is proposed for on-board g_m measurement using the voltage drop on the common source inductance of the MOSFET. The measured g_m is converted into digital pulse width, which can be easily measured using a microcontroller. A comprehensive comparison is presented to demonstrate the merits of the proposed method. Lastly, the accuracy and sensitivity of temperature and aging measurements using the proposed method is validated experimentally.

To address the challenges in long-term reliability testing of GaN power devices, this paper proposes a reconfigurable AC power cycling test setup. While addressing the limitations of existing aging tests, the proposed setup enables accelerated aging of GaN devices under a wide range of realistic stress conditions. Specifically, various hard and soft switching modes can be tested to realistically emulate different application scenarios. In addition to the ability to control test temperature, the setup also features adjustable power loop inductance that enables precise control over voltage overshoot during hard switching transients. Further, an on-state resistance based junction temperature estimation technique is used for closed loop junction temperature control. For this, a fast drain-source voltage measurement circuit along with an algorithm for closed-loop control of the mean junction temperature is presented in detail. Furthermore, the magnitudes of the temperature swing under different operation conditions are discussed in depth which provides a good insight to control temperature swings. Finally, a prototype is built to validate the proposed test design.

As automotive manufacturers move towards Silicon Carbide (SiC) MOSFET based traction inverters, practical online switch condition monitoring solutions are crucial to address potential reliability concerns. In this paper, an end-to-end practical online condition monitoring solution is proposed. An online sensing circuit is proposed which enables online on-state resistance ( R_ds-on ) measurement for all six switches of the inverter. To address the challenge of periodic data acquisition alongside higher priority motor control tasks, a fast, code-efficient out-of-order equivalent time sampling technique is also proposed. The obtained periodic, high resolution R_ds-on data is filtered by a Kalman filter stage. With the proposed measurement solution, R_ds-on obtained at the motor current peak has an error of < 1.5%. Furthermore, the symmetrical nature of the inverter’s operation is exploited to propose a Bayesian inference solution for independent online state-of-health (SoH) estimation for all six switches. This technique isolates aging related R_ds-on change from operating conditions related changes. In particular, by automatically accounting for device and system level variations in the model, the proposed Bayesian SoH estimation solution eliminates the need for extensive system/device specific calibration. The efficacy and robustness of the proposed solution are tested by inducing bond-wire failure in several decapsulated discrete SiC MOSFETs.

High performance motor control and fault diagnosis requires high resolution isolated signal measurement. Sigma-delta ADCs (SD-ADC) are ideal for this purpose but cause remarkable measurement latency which can cause performance degradation and stability issues. In this paper, the effects of current measurement latency caused by a sigma-delta filter module (SDFM) and corresponding latency compensation are discussed in detail. First, the effect of SD-ADC on system phase margin and ADC update delay is analyzed in detail. Consequently, a Kalman filter based technique is proposed to compensate the latency caused by the group delay of the digital filter and increase the phase/gain margin of the system. In addition, three PWM update strategies are proposed and their tradeoffs discussed. The proposed algorithm and measurement results are experimentally verified on a PMSM drive. It is shown that with the proposed solution, Sigma-delta ADC can provide much higher resolution than traditional SAR ADCs and also yield superior diagnostics capability and control.

Several techniques are proposed in the literature to improve the cross-regulation performance of a multiple output flyback converter (MOFC). However, some drawbacks exist, first, inability to completely eliminate cross-regulation, second, reduction of power density due to a high number of additional components, third, increased losses. To overcome these challenges, this article presents a scheme to independently control the outputs of an MOFC, thereby achieving an excellent cross-regulation performance over a wide range of loads, without any additional switching or magnetic component. The unique gate dependent reverse conduction characteristics of gallium nitride (GaN) high electron mobility transistor is utilized to control the flow of current to each of the output capacitors. The operational principle and the steady-state analysis are provided in detail. Moreover, design considerations, such as the switching frequency, GaN gate bias, leakage inductances, and output capacitance, are discussed, focusing on their impacts on the key design goals, particularly the efficiency, power density, and output voltage ripple. Furthermore, SPICE simulations are used to demonstrate the improvement in cross-regulation over existing schemes. Finally, a 40 W dual output laboratory prototype is built to verify the analysis. The measured maximum cross-regulation is 0.2%, which validates the effectiveness of the scheme.