Mailson Ribeiro Santos

The detection of faults in rolling bearings is essential for ensuring the reliability of industrial systems, given the critical role these components play in rotary equipment. Rolling bearings are particularly susceptible to degradation under harsh operating conditions, which can lead to severe mechanical failures. This paper presents two complementary, evolving-based approaches for detecting bearing faults using the Typicality and Eccentricity Data Analytic (TEDA) algorithm. TEDA is a dynamic, unsupervised method tailored for low-latency outlier detection, leveraging two core measures: typicality, which assesses similarity to historical data, and eccentricity, which quantifies deviation. Approach 1 follows a three-stage pipeline: (1) segmenting vibration signals into time windows, (2) extracting statistical features from each window, and (3) applying TEDA for fault detection. Approach 2 adopts a more direct strategy: (1) organizing raw vibration signal segments into time windows and (2) applying TEDA without explicit feature extraction. Both methods were evaluated using the widely recognized Case Western Reserve University (CWRU) bearing dataset. Experimental results show that both approaches deliver competitive and, in some cases, superior performance compared to traditional methods, even without a post-processing stage. Notably, Approach 1 achieved an average precision of 1.0000 and an F1-score of 0.9750 for class 1, outperforming a referenced state-of-the-art method that reached an F1-score of 0.9638. In addition to proposing two complementary detection pipelines, this work contributes by modifying the TEDA algorithm to enhance detection efficiency. Specifically, updates to TEDA’s internal variables are halted for detected outliers, streamlining processing and eliminating the need for additional post-processing stages.

Epilepsy is a condition that affects 50 million individuals globally, significantly impacting their quality of life. Epileptic seizures, a transient occurrence, are characterized by a spectrum of manifestations, including alterations in motor function and consciousness. These events impose restrictions on the daily lives of those affected, frequently resulting in social isolation and psychological distress. In response, numerous efforts have been directed towards the detection and prevention of epileptic seizures through EEG signal analysis, employing machine learning and deep learning methodologies. This study presents a methodology that reduces the number of features and channels required by simpler classifiers, leveraging Explainable Artificial Intelligence (XAI) for the detection of epileptic seizures. The proposed approach achieves performance metrics exceeding 95% in accuracy, precision, recall, and F1-score by utilizing merely six features and five channels in a temporal domain analysis, with a time window of 1 s. The model demonstrates robust generalization across the patient cohort included in the database, suggesting that feature reduction in simpler models—without resorting to deep learning—is adequate for seizure detection. The research underscores the potential for substantial reductions in the number of attributes and channels, advocating for the training of models with strategically selected electrodes, and thereby supporting the development of effective mobile applications for epileptic seizure detection.

This work proposes use a methodology for fault detection of Rolling Element Bearings using an online, evolving approach. The proposed methodology is composed of feature selection, statistical feature extraction, fault detection processing, low pass filter, and a time filter. The central part of our approach concerns the processing itself, in which we use an online learning evolving algorithm, named TEDA for fault detection. The proposal has been validated using data from bearing faults with different diameters. The results show the precision, recall, and f1 score of the different test scenarios performed.

The amount of data in real-time, such as time series and streaming data, available today continues to grow. Being able to analyze this data the moment it arrives can bring an immense added value. However, it also requires a lot of computational effort and new acceleration techniques. As a possible solution to this problem, this paper proposes a hardware architecture for Typicality and Eccentricity Data Analytic (TEDA) algorithm implemented on Field Programmable Gate Arrays (FPGA) for use in data streaming anomaly detection. TEDA is based on a new approach to outlier detection in the data stream context. The suggested design has a full parallel input of N elements and a 3-stage pipelined architecture to reduce the critical path and thus optimize the throughput. In order to validate the proposals, results of the occupation and throughput of the proposed hardware are presented. The design reached a speed of up to 693x, compared to other software platforms, with a throughput of up to 10.96 MSPs (Mega Sample Per second), using a small portion of the target FPGA resources. Besides, the bit accurate simulation results are also presented. This work is a pioneer in the hardware implementation of the TEDA technique in FPGA. The project aims to Xilinx Virtex-6 xc6vlx240t-1ff1156 as the target FPGA.

The amount of data in real-time, such as time series and streaming data, available today continues to grow. Being able to analyze this data the moment it arrives can bring an immense added value. However, it also requires a lot of computational effort and new acceleration techniques. As a possible solution to this problem, this paper proposes a hardware architecture for Typicality and Eccentricity Data Analytic (TEDA) algorithm implemented on Field Programmable Gate Arrays (FPGA) for use in data streaming anomaly detection. TEDA is based on a new approach to outlier detection in the data stream context. In order to validate the proposals, results of the occupation and throughput of the proposed hardware are presented. Besides, the bit accurate simulation results are also presented. The project aims to Xilinx Virtex-6 xc6vlx240t-1ff1156 as the target FPGA.