LDLin Dan

Lin Dan

*This is an algorithmically generated author record based on publicly available information.

Current Organizations / Institutes

The organizations/institutes from the scholar's latest article


Lin Dan has a total of 8 co-authors. Here are the top co-authors by number of shared publications:


Latest Publications

  • Open Access

    Optical Frequency Comb-Based Direct Two-Photon Cooling for Cold Atom Clock

    by Lin Dan, Hao Xu, Ping Guo, Jianye Zhao

    The performance of the cold atom clock based on coherent population trapping (CPT) improved when the temperature decreased. In order to obtain a lower temperature in the cold atom clock, we proposed a cooling scheme in this paper that employs direct two-photon transition using optical frequency combs (OFCs). Two trains of time-delayed pulses from opposite directions were utilized to interact with atoms. It was found that the temperature of the cold atoms reached the minimum if the pulse area was π and the time delay between the absorption pulse and the stimulated emission pulse was in the range from 0.7τ to τ. In this paper, it was confirmed that the proposed cooling process allowed for faster and more efficient momentum exchange between light and atoms, and the proposed cooling process could be applied to the atoms or molecules that could not be cooled to desired temperature through the single-photon cooling process. The 87Rb cooling, together with the CPT interrogating scheme using OFCs reduced the ratio value of linewidth/contrast, and the frequency stability of the cold atom clock hence improved by more than six times as per our calculation.

  • Wafer-Level Assembly of Physics Package for Chip-Scale Atomic Clocks

    by Ping Guo, Hongling Meng, Lin Dan, Jianye Zhao

    Chip-scale atomic clocks (CSACs) have been extensively investigated and many prototypes or products have been realized as time sensors. Researchers focus on improving the frequency stability performance, reducing the volume and the power consumption of CSACs. To the best of our knowledge, the physics packages reported until now are all assembled from discrete components. This traditional assembly method has a very low efficiency and causes variations among different physics packages. In this article, we propose a wafer-level assembled physics package for CSACs based on three dimensional (3-D) wafer-level packaging (WLP) and microelectromechanical system (MEMS) technologies. The components of the physics package are all fabricated on wafers. These wafers are integrated together vertically and then diced into separate physics packages. The proposed method has the advantages of high uniformity among different physics packages and high efficiency. And it improves the utilization rate of wafers by reducing the unused area. Thus, the production cost is reduced considerably. The volume of the proposed functional physics package is less than 8 mm 3 . The prototype chip-scale atomic clock incorporating the proposed physics package reveals the coherent population trapping (CPT) linewidth of 1.8 kHz and the total power consumption of about 20mW. The frequency stability is about $6.1 \times 10^{-12}$ @1000s. The observed results demonstrate promising performance of the wafer-level assembled physics package. The approach described in this article reveals a viable method for batch production for its low cost, high efficiency and high product uniformity.


  • Open Access

    Wafer-Level Filling of MEMS Vapor Cells Based on Chemical Reaction and Evaporation

    by Ping Guo, Hongling Meng, Lin Dan, Jianye Zhao

    Micro-electro-mechanical system (MEMS) vapor cells are key components for sensors such as chip-scale atomic clocks (CSACs) and magnetometers (CSAMs). Many approaches have been proposed to fabricate MEMS vapor cells. In this article, we propose a new method to fabricate wafer-level filling of MEMS vapor cells based on chemical reaction and evaporation. The Cs metals are firstly obtained through the chemical reaction between cesium chloride and barium azide in a reservoir baseplate. Then, the Cs metals are evaporated to the preform through the microchannel plate and condensed on the inner glass surface of the preform. Lastly, the MEMS vapor cells are filled with buffer gas, sealed by anodic bonding, and mechanically diced into three dimensions: 5 mm × 5 mm × 1.2 mm, 4 mm × 4 mm × 1.2 mm, and 3 mm × 3 mm × 1.2 mm. The full width at half maximum (FWHM) linewidth of the coherent population trapping (CPT) signal of the MEMS vapor cells is found to be 4.33 kHz. The intrinsic linewidth is about 1638 Hz. Based on the CPT signal, the frequency stability is 4.41 × 10−12@1000 s. The results demonstrate that the presented method of the wafer-level filling of MEMS vapor cells fulfills the requirements of sensors such as CSACs.


  • Open Access

    High Vacuum Packaging of MEMS Devices Containing Heterogeneous Discrete Components

    by Ping Guo, Hongling Meng, Lin Dan, Hao Xu, Jianye Zhao

    Vacuum packaging of Micro-electro-mechanical system (MEMS) devices is a hot topic for its advantages of improving performance and reducing power consumption. In this paper, the physics package of a chip scale atomic clock (CSAC), as a typical kind of MEMS device, is performed by vacuum packaging based on a systematic method proposed by us. The whole process, including low outgassing and thermal stable materials selection, prebaking for desorption, getter firing for absorption and solder reflow for vacuum sealing is introduced thoroughly. The thermogravimetric analysis or thermal gravimetric analysis (TGA) is used to analyze the thermal stability and desorption of materials. The leak rate of physics packages is measured to be less than 4 × 10−10 Pa·m3/s by helium leak detection. The residual gas pressure and composition in physics packages are analyzed after vacuum packaging. The results show a high vacuum ~0.1 Pa in the physics package. The frequency stability is improved from 4.68 × 10−11 to 1.07 × 10−11 @40,000 s. The presented method for high vacuum packaging is also applicable to other MEMS devices.


  • Advances of Chip-Scale Atomic Clock in Peking University in 2020

    by Jianye Zhao, Ping Guo, Lin Dan, Hao Xu, Hongling Meng

    Chip-scale atomic clock (CSAC) has the advantages of small volume, low power consumption and high frequency stability. We made improvements to the physics package and control algorithm of our CSAC in the last year, which reduces the power consumption of PP and improves the frequency stability of CSAC. Meanwhile, the 1 pulse per second (1PPS) time error of CSAC is also minimized. The total power consumption of PP is about 80 mW, and 1PPS time error keeps less than 20 ns in 3 minutes.