Nana Sutisna

The rapid growth of the Internet of Things (IoT) and smart devices has led to an increasing demand for real-time data processing at the edge of networks closer to the source of data generation. This review paper introduces how artificial intelligence (AI) can be integrated with edge computing to enable efficient and scalable object recognition applications. It covers the key considerations of employing deep learning on edge computing devices, such as selecting edge devices, deep learning frameworks, lightweight deep learning models, hardware optimization, and performance metrics. An example of an application is also presented in this article, which is about real-time power transmission line detection using edge computing devices. The evaluation results show the significance of implementing lightweight models and model compression techniques such as quantized Tiny YOLOv7. It also shows the hardware performance on some edge devices, such as Raspberry Pi and Jetson platforms. Through practical examples, readers will gain insights into designing and implementing AI-powered edge solutions for various object recognition use cases, including smart surveillance, autonomous vehicles, and industrial automation. The review concludes by addressing emerging trends, such as federated learning and hardware accelerators, which are set to shape the future of AI on edge computing for object recognition.

This paper presents a novel hardware-software co-deisgn approach to accelerate Q-learning algorithms using a RISC-V-based System-on-Chip (SoC) design. We introduce a maze-stitching algorithm that enables efficient solving of large, complex mazes by decomposing them into smaller sub-mazes and thus can perform Q-Learning computation in low-complexity hardware accelerator. Furthermore, we provide a comprehensive analysis of the algorithm’s complexity, theoretical performance gains, and practical implementation results. The proposed implementation demonstrates significant performance improvements over traditional software approaches, achieving speedups ranging from 84× to 233× for complex maze-solving tasks while maintaining a small footprint. The algorithm, even without the accelerator also achieved speedups ranging from 13× to 36×. The proposed system combines a 64-bit RISC-V core with a Q-Learning accelerator, operating at 50MHz on an Arty A7-100T FPGA. The maze-stitching technique allows for scaling to larger problem sizes while maintaining hardware efficiency. The proposed work can be applied to a lightweight accelerator and provides a scalable solution for resource-constrained edge computing environments.

Optical wireless communication (OWC) has been considered a promising solution for overcoming the spectrum limitations of RF in wireless communication. However, studies on OWC systems, particularly on actual real-time prototyping, are limited and only focus on simulation and experiments using waveform generators and oscilloscopes. Meanwhile, the data rate requirements for optical communication systems are rapidly increasing, approaching the Gbps range. Therefore, the development of real-time prototypes with high data speeds is essential and requires super sample rates (SSR), necessitating signal processing blocks capable of processing multiple samples in parallel within a single clock cycle while operating at very high clock frequencies. To address these requirements, this work proposes a parallel implementation of an orthogonal frequency division multiplexing (OFDM) baseband processor on an FPGA for OWC systems. The proposed system operates with a bandwidth of 320 MHz, achieving a maximum raw data rate of 720 Mbps at 16-QAM 3/4 modulation. This performance is comparable to that of the IEEE 802.11be WiFi 7 standard. The proposed system is applicable not only to underwater OWC but also for indoor OWC (e.g. Li-Fi), broadening its potential use cases in next-generation wireless communication networks.

In recent years, the development of artificial intelligence (AI) in aquaculture technologies has reached an unimaginable level of complexity with vast variations. One of the AI applications in aquaculture is smart fish appetite detection using convolutional neural networks (CNNs). This article specifically discusses the hardware implementation of the R(2+1)D CNN model, a variety of CNN that deconstructs 3-D convolutions into separate spatial (2-D) and temporal (1-D) components, achieving a balance between computational efficiency and accuracy. In this article, we provide several ideas and insights for the R(2+1)D model hardware implementation, highlighting its design complexity, performance, and potential applications in multimodal deep learning architectures by using the Winograd domain convolution. We also implement the R(2+1)D cores in parallel two and four. Experimental results show that the parallel four cores achieve up to 112.29× and 183.37× faster speed than the reference Tensorflow program for the 1-D and 2-D CNNs, respectively. The proposed parallel R(2+1)D CNN cores are implemented using the PYNQ FPGA board. The work is useful for embedded systems, FPGA implementations, and application-specific IC applications in aquaculture.

Reinforcement Learning (RL) applications are rapidly expanding across various fields, including robotics, autonomous vehicles, drones, communication systems, and control. However, RL computations are inherently complex and resource-intensive due to dynamic state spaces and real-time processing demands. This paper proposes a novel RL accelerator hardware architecture for edge computing, capable of supporting both inference and training modes. The design, tailored for Deep Q-Network (DQN) with Q-values computed using an Artificial Neural Network (ANN), employs hardware sharing and approximate activation functions and multipliers to enhance efficiency. Shared processing modules minimize chip size and power consumption, achieving an area efficiency of 44.25 KIPS/1KLUTs and 14.65 KIPS/1KLUTs. Implementation results demonstrate state processing times of 1.43 μs for inference and 4.31 μs for training. Deployed on an Ultra96 FPGA at 70 MHz, the system delivers 671× and 287× speedups for inference and training, respectively, with a DQN accelerator power consumption of just 13 mW. This architecture is highly suitable for autonomous systems in edge computing environments, addressing resource limitations and enhancing computational efficiency.

Fish is one of the most demanding protein sources in the food industry. However, the increasing demand must be followed by increasing production efficiency. One of the problems in fish production efficiency is an ineffective feeding method. In this paper, we address the problem of fish feeders using artificial intelligence in an aquarium. We propose fish appetite detection using multi-modal sensors resulting in the data for our AI system. Our AI system consists of R(2+1)D convolutional layers and dense networks to process video and accelerometer data. The video data is split into 20 frames and processed by an R(2+1)D convolutional neural network. The accelerometer data is used to train several networks such as 1-dimensional CNN, GRU, and dense (ANN). The system is implemented in an aquarium with two sensors i.e., a webcam camera and an accelerometer and a main board processing using Raspberry-Pi 4. Experimental results show that the proposed system outperforms other methods with validation accuracy up to 99.09% for the Zeromean dense model and up to 99.39% for the Filtered dense model. The work is useful for automation and efficiency in aquaculture.

Arrhythmia is a heart disorder in which the heart beats irregularly. Electrocardiogram (ECG) has been widely used as a tool for detecting arrhythmias although the interpretation of ECG recordings is still tedious, time-consuming, and become a difficult task since it needs beat-by-beat manual examination. In arrhythmia classification studies, the inter-patient method is required to obtain unbiased results and has been used in most studies to detect arrhythmias specifically in large classes, such as normal, ventricular, atrial, and fusion beats. However, this method is still limited to use in detecting more specific arrhythmias, particularly in morphological arrhythmias, such as bundle branch block and premature beats. In addition, the methods usually only use one ECG lead. To overcome this limitation, in this work, we propose inter-patient-based arrhythmias classification using combined two ECG leads automatically by employing machine learning methods, specifically ensemble learning. The classification is intended to detect 5 classes of morphological arrhythmia which are Left Bundle Branch Block (LBBB), Left Right Branch Block (RBBB), Premature Ventricular Contractions (PVC), Premature Atrial Contractions (PAC), and Normal. This work also details the method covering data set preparation, algorithm and design parameters exploration for pre-processing ECG signals, features extraction and selection, and hyper parameter tuning for employed machine learning methods. Evaluation results show that the proposed machine learning method, which is Ensemble Learning achieves performance improvements, compared to similar other works with average results of accuracy 87%, recall 87.4%, precision 88.4%, and F1-score 87%. These results correspond to performance improvements compare to state of the art methods for about 12% of accuracy, 28% of recall and 24% of precision, respectively. Furthermore, the proposed work potentially can be employed in real-world clinical practice, specifically as fast yet accurate aided tool for cardiac events diagnostic.