Yuqing Zhang
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Research Subjects
Yuqing Zhang has a total of 6 co-authors. Here are the top co-authors by number of shared publications:
- Ayesha Khalid
School of Electronics, Electrical Engineering and Computer Science, Queen’s University Belfast, Belfast BT9 5BN, UK
1 shared publication - Chenghua Wang
Nanjing University of Aeronautics and Astronautics, China
1 shared publication - Dur-E-Shahwar Kundi
Queen’s University Belfast
1 shared publication - Maire O'NEill
Centre for Secure Information Technologies (CSIT), Queens University Belfast, Belfast, U.K.
1 shared publication Maire Oneill
Centre for Secure Information Technologies (CSIT), Queens University Belfast, Belfast, U.K.
1 shared publication- Weiqiang Liu
Nanjing University of Aeronautics and Astronautics, China
1 shared publication
Latest Publications
- 25 January 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Emerging Topics in Computing
- Vol. 10 (4) , 1993-2005
Ultra High-Speed Polynomial Multiplications for Lattice-Based Cryptography on FPGAs
Lattice-based cryptography (LBC) has emerged as the most viable substitutes to the classical cryptographic schemes as 5 out of 7 finalist schemes in the 3rd round of the NIST post-quantum cryptography (PQC) standardization process are lattice based in construction. This work explores novel architectural optimizations in the FPGA-based hardware implementation of polynomial multiplication, which is a bottleneck in every LBC construction. To target ultra-high throughput, both schoolbook polynomial multiplication (SPM) and number theoretic transform (NTT) are explored: a completely parallel architecture of an SPM is undertaken while for NTT, radix-2 and radix-22 multi-path delay commutator (MDC) based pipelined architectures are adopted. Our proposed high-speed SPM (HSPM) structure on latest Xilinx UltraScale+ FPGA is 5 faster than the state-of-the-art LBC designs. Whereas, the proposed high-speed NTT (HNTT) structure (i.e., R22MDC) takes only 0.63s for the encryption, hence achieving the highest throughput of 408 Mbps. Moreover, all of the proposed designs achieve highest design efficiencies (i.e., throughput per slice (TPS)) in comparison to available LBC designs.
- 25 January 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Emerging Topics in Computing
- Vol. 10 (4) , 1993-2005
Ultra High-Speed Polynomial Multiplications for Lattice-Based Cryptography on FPGAs
Lattice-based cryptography (LBC) has emerged as the most viable substitutes to the classical cryptographic schemes as 5 out of 7 finalist schemes in the 3rd round of the NIST post-quantum cryptography (PQC) standardization process are lattice based in construction. This work explores novel architectural optimizations in the FPGA-based hardware implementation of polynomial multiplication, which is a bottleneck in every LBC construction. To target ultra-high throughput, both schoolbook polynomial multiplication (SPM) and number theoretic transform (NTT) are explored: a completely parallel architecture of an SPM is undertaken while for NTT, radix-2 and radix-22 multi-path delay commutator (MDC) based pipelined architectures are adopted. Our proposed high-speed SPM (HSPM) structure on latest Xilinx UltraScale+ FPGA is 5 faster than the state-of-the-art LBC designs. Whereas, the proposed high-speed NTT (HNTT) structure (i.e., R22MDC) takes only 0.63s for the encryption, hence achieving the highest throughput of 408 Mbps. Moreover, all of the proposed designs achieve highest design efficiencies (i.e., throughput per slice (TPS)) in comparison to available LBC designs.