Chenxin Liu

This article presents a Ka-band phased-array multiple-input multiple-output (MIMO) receiver for sixth-generation (6G) wireless networks. A time-division (TD) MIMO architecture is combined with DP antenna array to support eight MIMO streams in the Ka band. The complex weights of each RF element in both polarization arrays are sequentially switched at the Nyquist rate to enable fast-stream switching for MIMO stream coexistence. The TD approach achieves full phased-array reuse and delivers high array gain and spatial selectivity for each stream at the expense of generating switching harmonics. To address this issue, a non-uniform time-hopping (TH) sequence is introduced in this article to spectrally spread the switching harmonics and mitigate the direct blocker folding. A proof-of-concept phased-array receiver is fabricated in 65-nm CMOS, integrating eight RF elements in a 7.2-mm² core area and consuming 335.2 mW. Combined with DP antennas, the phased-array receiver supports $4 \times 4$ TD-MIMO across both polarizations and achieves a maximum data rate of 38.4Gb/s using eight 800-MHz 64-QAM signals in over-the-air (OTA) measurements. Benefiting from the TD-MIMO architecture, the phased-array receiver achieves 0.078 mm² and 5.23 mW per element per stream. With the proposed non-uniform TH (NUTH) dithering, deep notches are generated at switching harmonics and 42.9-dB alias suppression is achieved. The proposed phased-array receiver also demonstrates a 34-dB improvement in blocker tolerance, maintaining –30-dB EVM_rms under a 0-dBc in-band blocker sweeping across –90° to 90° field of view (FoV) in MIMO OTA measurements.

This work presents a D-band high-power-density four-element phased-array transceiver for 6G user equipment (UE). Conventional designs require large multi-stage LO generation circuits for D-band up/down conversion, making it difficult to achieve compact size and low-power consumption. To address this, we propose an integrated LO chain using an injection-locked tripling phase shifter (ILTPS), which enables both frequency tripling and phase shifting within a single circuit without multi-stage amplifiers. The ILTPS achieves an area of 0.088 mm² and a power consumption of 15 mW. In addition, to realize high power density, the transceiver integrates a bi-active sub-harmonic mixer (BA-SHM) and a D-band PA/LNA with PA-sharing TDD switching. An eight-element antenna-in-package (AiP) module using two transceiver ICs operates in the 142–164-GHz frequency range, achieving an EIRP of 25.7 dBm and a maximum data rate of 56 Gbps. The power consumption per element is 150 mW in TX mode and 93 mW in RX mode with 1 V VDD. The active area of this transceiver is 8.5 mm², and it is implemented using a 65 nm CMOS process.

This article presents a stacked-PCB-based broadband D-band horn antenna with high efficiency fabricated using a conventional PCB process. By replacing the conventional multilayered PCB with multiple stacked single-layer PCBs, the dielectric material inside the horn aperture is removed, and the antenna walls can be formed using vertically aligned through-holes. This architecture enables flexible stacking, allowing the aperture size to be scaled simply by adjusting the number of layers, which in turn scales the antenna gain. These modifications also lead to improved antenna characteristics, including gain and radiation pattern. The measured reflection coefficient remains below −18 dB across the entire D-band (110–170 GHz). The sidelobe is less than −10 dB and cross-polarization discrimination is lower than −30 dB. The gain is measured to be 19.8 $\pm$ 1.7 dB.

This article presents a 300-GHz-band amplifier-last outphasing phased-array transmitter with path mismatch calibration in a 65-nm CMOS technology. Calibration is essential for mitigating impairments in outphasing systems used for wideband communication. The transmitter integrates two independent sub-THz LO generation chains to calibrate the phase mismatch between two paths and configure the phase delay between different phased-array elements. An integrated RF outphasing amplifier calibrates the amplitude mismatch and improves the transmitter’s effective isotropic radiated power (EIRP). After calibration, the transmitter exhibits a 3.3-dB improvement in error vector magnitude and supports 16 QAM modulation at 52 Gb/s over a distance of 9 cm. It achieves a peak EIRP of 8.9 dBm at 246 GHz, with a minimum EIRP of 5.0 dBm across the frequency range from 237 to 250 GHz. An 8×1 phased-array transmitter is implemented, demonstrating a main lobe scanning range of ±12° in the $E$ -plane.

Sub-terahertz (Sub-THz) communication systems are a promising technology for next-generation high-speed, high-capacity wireless networks. Achieving this requires highly integrated antenna-in-package (AiP) solutions combining antennas and radio frequency integrated circuits (RFICs). However, high-frequency operation and dense integration increase RFIC heat density, potentially degrading AiP performance and reliability. This article proposes a sub-THz AiP with both excellent RF and thermal performance. The design features a multilayer antenna structure on a low-loss dielectric substrate, minimizing RFIC-to-antenna connections and radiating toward the substrate edge. A dual-sided heat dissipation structure is also introduced for efficient thermal management in stacked configurations. Validation through simulations and measurements confirmed good reflection characteristics ( $\vert $ S $11\vert \lt $ –10 dB), 15 dBi gain, and thermal resistance below 4.1 K/W. 2-D beam steering was also demonstrated, highlighting the effectiveness of the proposed co-design approach.

This article introduces a compact D-band phase shifter, which achieves high-resolution phase steps and ultra-low phase error, designed for the sixth-generation (6G) mobile network. The proposed design integrates two novel circuit architectures: a feedback fine-tuning phase shifter (FFPS) provides precise phase control with fine 0.1° steps over a 22.5° range by using a feedback transmission line (TL) to enhance gain and tuning range. The second architecture is a two-mode non-uniform propagation delay phase shifter (2-mode NU-PDPS), which enables coarse phase tuning with 22.5° steps, covering a full 360° phase range. It employs non-uniform MOSFET sizing to realize ideal TL operation. In addition, two modes are introduced in the quarter-wave TL to increase phase resolution without increasing area and thus achieves a core area of 0.06 $\text {mm}^{2}$ . The proposed phase shifter operates with 0.1° steps over a 360° fine-tuning range within the frequency range of 150–160 GHz. It achieves an rms phase error of 0.68°, the lowest among reported phase shifters in this frequency range. The total power consumption is 5mW at 1.0-V VDD, with an insertion loss of −2.5dB.

To realize the practical application of sub-THz band wireless communication toward 6G, it is necessary to develop AiP modules with compact size and low cost. This letter discusses the design of a miniaturized AiP module for high-speed wireless communication targeting extended reality (XR) applications in medical operating rooms as an example of 6G use cases. By integrating waveguide antenna array along with a compact divider/combiner within the multilayer substrates, the module achieves a small form factor of $8.42\times 20.0\times 1.37$ mm while integrating radio frequency integrated circuit (RFIC) and peripheral surface mount components. The measurement shows a data rate of 40 Gb/s at a 3 m distance in the 150 GHz band with an excellent transmission energy efficiency of 35.7 pJ/bit.

A D-band (114--170GHz) CMOS transceiver (TRX) chipset covering a 56GHz signal-chain bandwidth with a 640-Gb/s data rate is proposed in this work. The design includes an 8-way low-Q power-combined power amplifier (PA), a 2-way low-Q power-combined low noise amplifier (LNA), wideband-impedance-transformation mixers, and common-source-based cascaded distributed amplifiers (DA) to improve bandwidth and linearity. The proposed TRX chipset achieves a 200Gb/s SISO data rate and a 640Gb/s MIMO data rate.