Lei Ding

In conventional field-effect transistors (FETs), the gate dielectric primarily provides electrostatic control of the channel and is engineered to remain chemically and electronically inert to ensure stable operation. Emerging studies, however, suggest that functional dielectrics integrated with two-dimensional (2D) semiconductors can introduce additional physical mechanisms that influence device behavior. Here, we investigate AgInP2S6 (AIPS), a high-κ van der Waals thiophosphate, as a functional top-gate dielectric in MoS2 field-effect transistors. The AIPS/MoS2 heterointerface exhibits coupled opto-ionic-electronic interactions, where defect-mediated sub-bandgap photoactivity and photon-assisted Ag+ ion migration independently occur within the dielectric yet collectively modulate the channel conductance. Optical excitation redistributes charge within the dielectric, gradually reconfiguring the ionic landscape and altering the interfacial electrostatic potential. The resulting conductance exhibits strong temperature dependence. At low temperatures (∼0 °C), reduced phonon activity suppresses Ag+ mobility, leading to persistent photoconductivity. At elevated temperatures (∼80 °C), thermally activated ion hopping accelerates relaxation of the stored state. This temperature-dependent retention behavior enables a thermally tunable fading memory response, where the persistence of the optically induced conductance state can be controlled through ionic dynamics. These results highlight how opto-ionic coupling at 2D/dielectric interfaces can introduce stimulus-responsive functionality in transistor architectures, providing a platform for devices that combine sensing and memory behavior within the gate stack.

Edge contacts offer strong bonding and the potential for lower specific contact resistance to two-dimensional (2D) chalcogenide semiconductors, albeit to a very small area, and they are friendlier to scaling compared to top contacts. Physical vapor deposition (PVD) techniques are often used to fabricate contacts to 2D semiconductors and other electronic devices. However, PVD processes are not as easily scalable for edge contact manufacturing. In this work, we have studied thermal atomic layer deposition (ALD) of TiS₂ using tetrakis (dimethylamido) titanium and hydrogen sulfide for forming uniform and conformal edge contacts on single-layer MoS₂. Characterization of the TiS₂ was performed using Raman spectroscopy, x-ray photoelectron spectroscopy, and scanning transmission electron microscopy to confirm the contact composition. A contact resistance of 130 Ω·mm was measured with a barrier height of 0.43 eV for the ALD-deposited edge contact TiS₂/MoS₂. Thermal ALD processes of the other possible edge contact materials to 2D semiconductors are being developed, including TiN. Furthermore, we have studied a scalable process for multi-tier edge contact fabrication using ALD, which would be more difficult to achieve via PVD, demonstrating the promising potential of ALD for forming electrical contacts to 2D semiconductors. The authors are grateful to NSF (ECCS 2227346), the NSF 2DCC MIP platform (DMR 2039351), and The Pennsylvania State University for support of this work. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.

Cryogenic computing platforms for quantum information processing, superconducting logic and space electronics demand non-volatile memories that can simultaneously deliver nanosecond programming, low-voltage operation, multi-level storage and long-term retention below 20 K. Conventional Flash memories, which rely on Fowler–Nordheim (FN) tunnelling or hot-carrier injection through oxide barriers, require large electric fields and exhibit pronounced temperature dependence, limiting both speed and energy efficiency at cryogenic temperatures. Ferroelectric memories offer low-voltage polarization switching and can operate at reduced temperatures; however, achieving stable, finely resolved multibit states remains challenging, particularly in scaled devices where switching is governed by stochastic domain evolution. Here we report a cryogenic non-volatile memory that exploit direct quantum tunnelling from a metallic gate into trap states within the layered van der Waals (vdW) insulator AgInP2S6 across its intrinsic vdW air gap. The stored charge is read non-destructively using a MoS2 field-effect transistor channel. Programming is mediated by temperature-insensitive direct tunnelling rather than field-driven FN injection, enabling ultra-fast operation without high-voltage overhead. The device operates at 15 K with programming times of ~ 30 ns at write voltages below 5 V, endurance exceeding 106 cycles and projected retention approaching 100 days. We further resolve more than 128 distinct and stable conductance states, corresponding to 7-bit storage within a single device. By harnessing the atomically thin vdW gap as an intrinsic quantum tunnelling barrier, this architecture establishes a compact and scalable route to high-density cryogenic memory and a pathway to reduced latency and interconnect overhead in quantum–classical interfaces.

Contact engineering for two-dimensional (2D) field effect transistors (FETs) has advanced rapidly, with near-quantum-limit contact resistances (R_C) now reported for top contacts formed by physical vapor deposition (PVD) techniques. However, top contacts are inherently scaling-unfriendly because they are limited by transfer-length (L_T). As contact length (L_C) shrinks below L_T, current crowding inflates R_C, constraining footprint scaling. Furthermore, this contact geometry is also ill-matched to stacked nanosheet and gate all around (GAA) transistor technology, which demands tier-addressable, minimal-footprint contacts, i.e., edge contacts. Early reports on edge contact to 2D materials involve PVD approaches with minimal control on the contact/2D interface. Here we introduce a scalable, chemistry-defined edge-contact platform based on atomic layer deposition (ALD) of metallic transition-metal chalcogenides, which exploits the intrinsic reactivity contrast between inert 2D basal planes and under-coordinated edges. Using ALD-grown TiS2 as a prototype, we form conformal edge contacts to wafer-scale monolayer MoS2, WS2, MoSe2 and WSe2, as well as to a multi-tier MoS2 nanosheet stack, illustrating natural compatibility with 2D GAA geometries. For TiS2–MoS2 edge contacts we obtain a contact resistance of ~130 kΩ·µm, consistent with a Schottky barrier of ~0.43 eV, and establish wafer-scale reproducibility through statistics on 100 n-type and 100 p-type devices. First-principles quantum-transport calculations both reproduce the measured barriers and identify alternative ALD-compatible metals that approach near-ohmic edge injection, while revealing that mode matching and edge termination are as critical as band alignment. Finally, complementary inverters assembled from MoS2/WSe2 edge-contacted FETs demonstrate functional logic with well-defined gain, noise margins and static power, positioning ALD-engineered edge contacts as a practical route to high-density 2D CMOS and 3D-integrated nanosheet technologies.

Hard masks with high etch selectivity are essential for fabricating high-aspect-ratio nanostructures via deep and anisotropic plasma etching. While most two-dimensional materials are susceptible to plasma damage, we report that van der Waals metal oxyhalides, specifically CrOCl and FeOCl, exhibit extraordinary resistance to aggressive SF₆/O₂ plasma, far surpassing conventional hard mask materials. CrOCl achieves etch rates as low as ~2.4 nm min⁻¹ and an etch selectivity >200:1 relative to silicon, representing improvements of ~30× over Si₃N₄, ~2.3× over Al₂O₃ and ~20× over TiN under identical conditions. CrOCl maintains subnanometre surface roughness after etching, even exhibiting plasma-induced surface smoothening. Beyond its inherent etch resistance, CrOCl can be chemically patterned using Cl₂ plasma and mechanically transferred onto a broad range of substrates, including perovskite oxides, polymers, glasses and monolayer two-dimensional semiconductors, enabling patterning on materials that are typically incompatible with conventional hard masks. Using CrOCl masks, we demonstrate deep silicon etching with aspect ratios exceeding 39:1 and minimal feature distortion. These findings establish van der Waals metal oxyhalides as a versatile and scalable platform for next-generation nanofabrication, combining extreme plasma robustness, high-resolution patternability and broad substrate compatibility in one material system.

Individual finger movements are well-articulated movements of fine body parts, the successful decoding of which can provide extra degrees of freedom to drive brain computer interface (BCI) applications. Past studies present some unique features revealed from spectral principal component analysis (PCA) on electrophysiological data recorded in both the surface of the brain (electrocorticography, ECoG) and the scalp (electroencephalography, EEG). These features contain discriminable information about fine individual finger movements from one hand. However, the efficacy of these spectral features has not been well investigated under the application of various classifiers. In the present study, we set out to investigate the topic using noninvasive human EEG. Several classifiers were chosen to explore their capability in capturing the spectral PC features to decode individual finger movements pairwisely from one hand using noninvasive EEG, aiming to investigate the efficacy of these spectral features in a decoding task.