Dongyan Wu
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Research Subjects
Research Interests
Dongyan Wu has a total of 2 co-authors. Here are the top co-authors by number of shared publications:
- Chongben Tao
Suzhou University of Science and Technology
2 shared publications - Yuzhou Liu
School of Electronic and Information Engineering, Suzhou University of Science and Technology, Suzhou 215000, China
2 shared publications
Latest Publications
- Open Access
- 31 January 2024
- Published by MDPI AG in Electronics
- Vol. 13 (3) , 576
Correction: Wu et al. A Universal Accelerated Coprocessor for Object Detection Based on RISC-V. Electronics 2023, 12, 475
- 31 January 2024
- Published by MDPI AG in Electronics
- Vol. 13 (3) , 576
Open AccessCorrection: Wu et al. A Universal Accelerated Coprocessor for Object Detection Based on RISC-V. Electronics 2023, 12, 475
- Open Access
- 17 January 2023
- Published by MDPI AG in Electronics
- Vol. 12 (3) , 475
A Universal Accelerated Coprocessor for Object Detection Based on RISC-V
With the application of object detection (OD) technology in various fields, common OD methods have been increasingly widely used, which poses a challenge to their calculative performance and accuracy. To improve the computational performance of OD algorithms, a general-purpose accelerated coprocessor was designed and implemented based on the extensibility of the RISC-V architecture. The accelerator was transformed into the form of a coprocessor and connected to its CPU core through the EAI coprocessor interface. Meanwhile, the corresponding instructions were designed, and the acceleration library functions were established. Finally, the performance and resource depletion of the coprocessor were analyzed on the FPGA platform. The experimental results suggest that only 10,091 LUTs were consumed by the accelerated coprocessor designed in this study, accounting for 52.2% of the entire SoC system. Moreover, the processing capacity of the YOLOv3 algorithm was 6.33 times that of a general-purpose CPU.
- 17 January 2023
- Published by MDPI AG in Electronics
- Vol. 12 (3) , 475
Open AccessA Universal Accelerated Coprocessor for Object Detection Based on RISC-V
With the application of object detection (OD) technology in various fields, common OD methods have been increasingly widely used, which poses a challenge to their calculative performance and accuracy. To improve the computational performance of OD algorithms, a general-purpose accelerated coprocessor was designed and implemented based on the extensibility of the RISC-V architecture. The accelerator was transformed into the form of a coprocessor and connected to its CPU core through the EAI coprocessor interface. Meanwhile, the corresponding instructions were designed, and the acceleration library functions were established. Finally, the performance and resource depletion of the coprocessor were analyzed on the FPGA platform. The experimental results suggest that only 10,091 LUTs were consumed by the accelerated coprocessor designed in this study, accounting for 52.2% of the entire SoC system. Moreover, the processing capacity of the YOLOv3 algorithm was 6.33 times that of a general-purpose CPU.