Mattia Luigi Torres
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Mattia Luigi Torres has a total of 12 co-authors. Here are the top co-authors by number of shared publications:
- Alessio Antolini
ARCES-DEI, University of Bologna, Bologna, Italy
1 shared publication - Alex Marchioni
Department of Electrical, Electronic, and Information Engineering, University of Bologna, Bologna, Italy
1 shared publication - Andrea Lico
ARCES-DEI, University of Bologna, Bologna, Italy
1 shared publication - Carmine Paolino
Department of ECE, Nanolab, Advanced Technology Laboratory, Tufts University, Medford, MA, USA
1 shared publication - Eleonora Franchi Scarselli
ARCES-DEI, University of Bologna, Bologna, Italy
1 shared publication - Fabio Pareschi
Politecnico di Torino
1 shared publication
Latest Publications
- Open Access
- 13 February 2023
- Published by MDPI AG in Journal of Low Power Electronics and Applications
- Vol. 13 (1) , 17
Decoding Algorithms and HW Strategies to Mitigate Uncertainties in a PCM-Based Analog Encoder for Compressed Sensing
Analog In-Memory computing (AIMC) is a novel paradigm looking for solutions to prevent the unnecessary transfer of data by distributing computation within memory elements. One such operation is matrix-vector multiplication (MVM), a workhorse of many fields ranging from linear regression to Deep Learning. The same concept can be readily applied to the encoding stage in Compressed Sensing (CS) systems, where an MVM operation maps input signals into compressed measurements. With a focus on an encoder built on top of a Phase-Change Memory (PCM) AIMC platform, the effects of device non-idealities, namely programming spread and drift over time, are observed in terms of the reconstruction quality obtained for synthetic signals, sparse in the Discrete Cosine Transform (DCT) domain. PCM devices are simulated using statistical models summarizing the properties experimentally observed in an AIMC prototype, designed in a 90 nm STMicroelectronics technology. Different families of decoders are tested, and tradeoffs in terms of encoding energy are analyzed. Furthermore, the benefits of a hardware drift compensation strategy are also observed, highlighting its necessity to prevent the need for a complete reprogramming of the entire analog array. The results show >30 dB average reconstruction quality for mid-range conductances and a suitably selected decoder right after programming. Additionally, the hardware drift compensation strategy enables robust performance even when different drift conditions are tested.
- 13 February 2023
- Published by MDPI AG in Journal of Low Power Electronics and Applications
- Vol. 13 (1) , 17
Open AccessDecoding Algorithms and HW Strategies to Mitigate Uncertainties in a PCM-Based Analog Encoder for Compressed Sensing
Analog In-Memory computing (AIMC) is a novel paradigm looking for solutions to prevent the unnecessary transfer of data by distributing computation within memory elements. One such operation is matrix-vector multiplication (MVM), a workhorse of many fields ranging from linear regression to Deep Learning. The same concept can be readily applied to the encoding stage in Compressed Sensing (CS) systems, where an MVM operation maps input signals into compressed measurements. With a focus on an encoder built on top of a Phase-Change Memory (PCM) AIMC platform, the effects of device non-idealities, namely programming spread and drift over time, are observed in terms of the reconstruction quality obtained for synthetic signals, sparse in the Discrete Cosine Transform (DCT) domain. PCM devices are simulated using statistical models summarizing the properties experimentally observed in an AIMC prototype, designed in a 90 nm STMicroelectronics technology. Different families of decoders are tested, and tradeoffs in terms of encoding energy are analyzed. Furthermore, the benefits of a hardware drift compensation strategy are also observed, highlighting its necessity to prevent the need for a complete reprogramming of the entire analog array. The results show >30 dB average reconstruction quality for mid-range conductances and a suitably selected decoder right after programming. Additionally, the hardware drift compensation strategy enables robust performance even when different drift conditions are tested.