W. Xiong
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
W. Xiong has a total of 12 co-authors. Here are the top co-authors by number of shared publications:
C.H. Hsu
Central R&D, United Microelectronics Corporation (UMC), No. 3, Li-Hsin Rd. II, Hsin-Chu, Taiwan
2 shared publicationsJ.P. Colinge
Tyndall National Institute, Cork, Ireland; University of California, Davis, CA USA
2 shared publicationsM. Ma
Central R&D, United Microelectronics Corporation (UMC), No. 3, Li-Hsin Rd. II, Hsin-Chu, Taiwan
2 shared publicationsP. Patruno
SOITEC S.A., Parc Technologique des Fontaines - 38190 Bernin, France
2 shared publicationsA. Afzalian
Tyndall National Institute, Cork, Ireland
1 shared publicationC-W. Lee
Tyndall National Institute, Cork, Ireland
1 shared publication
Latest Publications
- 1 October 2007
- Published by Institute of Electrical and Electronics Engineers (IEEE) in 2007 IEEE International SOI Conference
- No. 1078621X,p. 29-30
Multi-Gate SOI MOSFET Operations in Harsh Environments
This paper reviews MuGFET (multi-gate MOSFET) devices performance under extreme temperature range (5-573 K) and total radiation dose up to 6 Mrad. It is concluded that MuGFET is not only a good platform for CMOS scaling, but also an excellent platform for operation in harsh environments.
- 1 October 2007
- Published by Institute of Electrical and Electronics Engineers (IEEE) in 2007 IEEE International SOI Conference
- No. 1078621X,p. 29-30
Multi-Gate SOI MOSFET Operations in Harsh Environments
This paper reviews MuGFET (multi-gate MOSFET) devices performance under extreme temperature range (5-573 K) and total radiation dose up to 6 Mrad. It is concluded that MuGFET is not only a good platform for CMOS scaling, but also an excellent platform for operation in harsh environments.
- 1 October 2007
- Published by Institute of Electrical and Electronics Engineers (IEEE) in 2007 IEEE International SOI Conference
- No. 1078621X,p. 35-36
Influence of Fluorine Implant on Threshold Voltage for Metal Gate FDSOI and MuGFET
The origin of the large Vt shift observed in planar FDSOI is the creation of negative charge states in the BOX by F implant. F implant is a suitable approach for planar FDSOI SoC integration with single WF metal gate, but NOT for MuGFETs. F implant degrades electron mobility and the degradation is a function of F dose. The hole mobility is unaffected by F implant.
- 1 October 2007
- Published by Institute of Electrical and Electronics Engineers (IEEE) in 2007 IEEE International SOI Conference
- No. 1078621X,p. 35-36
Influence of Fluorine Implant on Threshold Voltage for Metal Gate FDSOI and MuGFET
The origin of the large Vt shift observed in planar FDSOI is the creation of negative charge states in the BOX by F implant. F implant is a suitable approach for planar FDSOI SoC integration with single WF metal gate, but NOT for MuGFETs. F implant degrades electron mobility and the degradation is a function of F dose. The hole mobility is unaffected by F implant.