Yinyu Wang
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Yinyu Wang has a total of 8 co-authors. Here are the top co-authors by number of shared publications:
- Desheng Zhang
Huazhong University of Science and Technology
2 shared publications - Haoran Xu
School of Integrated Circuits, Huazhong University of Science and Technology, Wuhan, China
2 shared publications - Huangpeng Zhang
School of Integrated Circuits, Huazhong University of Science and Technology, Wuhan 430074, China
2 shared publications - Liangliang Lu
School of Integrated Circuits, Huazhong University of Science and Technology, Wuhan 430074, China
1 shared publication - Qiaoling Tong
Huazhong University of Science and Technology
1 shared publication - Run Min
Huazhong University of Science and Technology
1 shared publication
Latest Publications
- Open Access
- 26 December 2023
- Published by MDPI AG in Electronics
- Vol. 13 (1) , 107
A Transient Event-Capturing Circuit and Adaptive PI Control for a Voltage Mode Superbuck Converter
This paper proposes a transient event-capturing circuit and adaptive PI control to monitor and improve the transient response of a superbuck converter. The transient event-capturing circuit is composed of coupling and capturing circuits. The coupling circuit converts the output voltage to the sensed voltage, whereas the DC and ripple components are eliminated. By counting the up-crossing and down-crossing numbers of the sensed voltage, the capturing circuit classifies the output voltage response into different transient events according to oscillation cycles. The transient events carry the stability information that can be used to adjust the bandwidth and phase margin. Finally, an adaptive PI controller is implemented with the proposed transient event-capturing circuit to improve the stability and transient response. Experimental results of the 100 W superbuck converter verify the effectiveness of the adaptive PI controller for improving the transient response and stability. The adaptive PI controller eliminates the oscillations due to deviated parameters and operating conditions. The maximum oscillation amplitude is reduced from 2 V to 400 mV at the reference voltage change.
- 26 December 2023
- Published by MDPI AG in Electronics
- Vol. 13 (1) , 107
Open AccessA Transient Event-Capturing Circuit and Adaptive PI Control for a Voltage Mode Superbuck Converter
This paper proposes a transient event-capturing circuit and adaptive PI control to monitor and improve the transient response of a superbuck converter. The transient event-capturing circuit is composed of coupling and capturing circuits. The coupling circuit converts the output voltage to the sensed voltage, whereas the DC and ripple components are eliminated. By counting the up-crossing and down-crossing numbers of the sensed voltage, the capturing circuit classifies the output voltage response into different transient events according to oscillation cycles. The transient events carry the stability information that can be used to adjust the bandwidth and phase margin. Finally, an adaptive PI controller is implemented with the proposed transient event-capturing circuit to improve the stability and transient response. Experimental results of the 100 W superbuck converter verify the effectiveness of the adaptive PI controller for improving the transient response and stability. The adaptive PI controller eliminates the oscillations due to deviated parameters and operating conditions. The maximum oscillation amplitude is reduced from 2 V to 400 mV at the reference voltage change.
- Open Access
- 11 December 2023
- Published by MDPI AG in Applied Sciences
- Vol. 13 (24) , 13166
Technical Reviews of Power Loss Optimization in High-Frequency PSiPs—In Relation to Power Switches and Power Inductors
Power losses of switches and inductors are consistent challenges that hinder the development of high-frequency power supply in package (PSiP). This paper investigates the roadmap for power loss optimizations of switches and inductors in high-frequency PSiPs. Firstly, a size and parallel quantity design method to reduce power loss in an integrated Si LDMOSFET is provided with comprehensive consideration of switching frequency and power levels. Secondly, quality factors of different air-core inductors are analyzed with consideration of geometric parameters and skin effect, which provides the winding structure optimization to reduce power losses. The power losses of the integrated Si LDMOSFET and air-core inductors are both reduced to less than 10% of the output power at 1~100 MHz switching frequency and 0.1~10 W power level. Finally, based on the above optimizations, power losses of switches and inductors are calculated with switching frequency and power level. Combining the calculated results, this paper predicts the efficiency boundaries of PSiPs. Upon efficiency normalization with consideration of input and output voltage levels, all the predictions are consistent with the published literature. The efficiency predication error is 1~15% at 1~100 MHz switching frequency and 0.1~10 W power level. The above power loss optimizations improve the efficiency, which provides potential roadmaps for achieving high-frequency PSiPs.
- 11 December 2023
- Published by MDPI AG in Applied Sciences
- Vol. 13 (24) , 13166
Open AccessTechnical Reviews of Power Loss Optimization in High-Frequency PSiPs—In Relation to Power Switches and Power Inductors
Power losses of switches and inductors are consistent challenges that hinder the development of high-frequency power supply in package (PSiP). This paper investigates the roadmap for power loss optimizations of switches and inductors in high-frequency PSiPs. Firstly, a size and parallel quantity design method to reduce power loss in an integrated Si LDMOSFET is provided with comprehensive consideration of switching frequency and power levels. Secondly, quality factors of different air-core inductors are analyzed with consideration of geometric parameters and skin effect, which provides the winding structure optimization to reduce power losses. The power losses of the integrated Si LDMOSFET and air-core inductors are both reduced to less than 10% of the output power at 1~100 MHz switching frequency and 0.1~10 W power level. Finally, based on the above optimizations, power losses of switches and inductors are calculated with switching frequency and power level. Combining the calculated results, this paper predicts the efficiency boundaries of PSiPs. Upon efficiency normalization with consideration of input and output voltage levels, all the predictions are consistent with the published literature. The efficiency predication error is 1~15% at 1~100 MHz switching frequency and 0.1~10 W power level. The above power loss optimizations improve the efficiency, which provides potential roadmaps for achieving high-frequency PSiPs.