Zheyang Li

Silicon carbide (SiC) is attracting increasing attention due to its superior properties. Chemical vapor deposition on off-axis substrates is the typical method for growing epilayers. Although SiC epitaxy has achieved tremendous success in industry, the atomic-scale understanding of step morphology evolution and the influence of substrate orientations on the deposition process of 4H-SiC films remains limited. In this work, we systematically study the deposition process on two off-axis substrates oriented toward (11-20) and (1-100) and two on-axis (11-20) and (1-100) substrates using molecular dynamics (MD) simulations. On off-axis substrates, step morphology changes dynamically during deposition; kink formation stabilizes step-flow growth but also enhances step–step interactions, leading to step bunching. In contrast, on on-axis (11-20) and (1-100) planes, direct bonding between adatoms and surface dangling bonds effectively bypasses long-range diffusion within the MD timescale, resulting in stable, high-quality 4H-SiC films with strong immunity to defects. The two non-polar surfaces exhibit distinct behaviors: the (11-20) plane develops periodic undulations that may serve as a strain-relief pathway, yielding a nearly perfect 4H-SiC structure, while the (1-100) plane remains flat with minor local structural disorder. Cross-sectional lattice occupation analysis confirms that both surfaces retain the correct 4H-SiC stacking sequence in the bulk region. These findings deepen the atomic-scale understanding of step dynamics and orientation-dependent growth in SiC epitaxy, and provide guidance for developing non-polar face epitaxy toward thick, high-quality epilayers for next-generation power devices.

Surge reliability is a crucial aspect of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) reliability. This study investigates the degradation behavior and mechanisms of switching characteristics in 1.2 kV planar-gate SiC MOSFETs under repetitive surge current. A surge current test platform is established to conduct surge tests on the device, while monitoring the evolution of its switching characteristics. The results indicate that after 4000 surge current cycles, the device’s turn-on delay time (t_d(on)), rise time (t_r), and turn-on loss (E_ON) show no significant changes. In contrast, the turn-off delay time (t_d(off)), fall time (t_f), and turn-off loss (E_OFF) increase by 9%, 7.5%, and 8.3%, respectively. Switching characteristics variations are closely linked to the reduction in threshold voltage (V_TH) and the increase in gate-source capacitance (C_GS) and gate-drain capacitance (C_GD). The degradation of these parameters stems from the accumulation of positive trapped charge in the gate oxide layer above the channel and junction field-effect transistor (JFET) region. The increase in charges results from the combined effects of negative gate bias and cyclic high temperature induced by repetitive surge current. This study provides a theoretical basis for the comprehensive understanding of the impact of surge current on SiC MOSFET performance.

Silicon carbide (SiC) is one of the ideal electronic materials for producing high-temperature, high-frequency, and high-power electronic devices. In the past 20 years, with the continuous improvement of silicon carbide material processing technology, its application have been expanding. Unlike Si devices, SiC devices cannot be directly fabricated on crude wafers. Instead, epitaxial films need to be deposited and grown on SiC wafers, then the epitaxial films will be used to produce devices. The doping concentration performance of the epitaxial layer can determine the device performance, making it the most important indicator of the epitaxial layer quality. For a long time, nitrogen has been used as the dopant in the production of SiC epi-wafers. Due to the difficulty of nitrogen cracking and its adsorption in graphite, the concentration is prone to significant drift, resulting in a decrease in yield and low production efficiency. In this research a vertical epitaxial equipment was used to consecutively grow 10 8-inch SiC substrate with nitrogen and ammonia as dopant separately. The concentration and thickness of the grown epitaxial films were measured and studied. The results indicate that compared to nitrogen as a dopant, the results of ammonia doping are significantly better in terms of intra-wafer concentration uniformity and inter-wafer consistency. Using nitrogen as the dopant, the doping concentrations uniformity of epi-layer ranges from 1.31% to 2.18%, and the deviation is between ± 8.0%. As a comparison, using ammonia as the dopant, the doping concentration uniformity of epi-layer ranges from 0.65% to 0.89%, and the deviation is between ± 1.0%. Meanwhile, the thickness performance is at the same level. Therefore, ammonia as a dopant can solve the concentration drift problem that has long been a headache in large-scale production of SiC epitaxy, greatly improving production efficiency. Its advantages are obvious. This study analyzed the possible reasons for the superior performance of ammonia gas as a dopant for 4H SiC epitaxy compared to nitrogen.

A 4H-silicon carbide (SiC) trench gate metal–oxide–semiconductor field-effect transistor (MOSFET) with dual integrated Schottky barrier diodes (SBDs) was characterized using numerical simulations. The advantage of three-dimensional stacked integration is that it allows the proposed structure to obtain an electric field of below 0.6 MV/cm in the gate oxide and SBD contacts and achieve ~10% lower forward voltage of SBDs than the planar gate SBD-integrated MOSFET (PSI-MOS) and the trench gate structure with three p-type-protecting layers (TPL-MOS). The dual-SBD-integrated MOSFET (DSI-MOS) also highlights the better influences of the more than 70% reduction in the miller charge, as well as the over 50% reduction in switching loss compared to the others. Furthermore, the short-circuit (SC) robustness of the three devices was identified. The DSI-MOS attains the critical energy and the aluminum melting point in a longer SC time interval than the TPL-MOS. The p-shield layers in the DSI-MOS are demonstrated to yield the huge benefit of improving the reliability of the contacts when SC reliability is considered.