Jinyi Xu
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Research Subjects
Jinyi Xu has a total of 12 co-authors. Here are the top co-authors by number of shared publications:
- Feng He
Beijing Huairou Laboratory, Beijing 101409, China
1 shared publication - Feng Zhang
Xiamen University
1 shared publication - Kaige Huang
Laboratory of Solid-State Optoelectronics Information Technology, Beijing Key Laboratory of Low Dimensional Semiconductor Materials and Devices, Key Laboratory of Semiconductor Material Sciences, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
1 shared publication - Ling Sang
State Key Laboratory of Advanced Power Transmission Technology, Beijing Institute of Smart Energy, Beijing 102209, China
1 shared publication - Rui Jin
Beijing Huairou Laboratory, Beijing 101409, China
1 shared publication - Shizhong Yue
Laboratory of Solid‐State Optoelectronics Information Technology Beijing Key Laboratory of Low Dimensional Semiconductor Materials and Devices Institute of Semiconductors Chinese Academy of Sciences Beijing China
1 shared publication
Latest Publications
- Open Access
- 21 February 2025
- Published by MDPI AG in Electronics
- Vol. 14 (5) , 853
Short-Circuit Characteristic Analysis of SiC Trench MOSFETs with Dual Integrated Schottky Barrier Diodes
A 4H-silicon carbide (SiC) trench gate metal–oxide–semiconductor field-effect transistor (MOSFET) with dual integrated Schottky barrier diodes (SBDs) was characterized using numerical simulations. The advantage of three-dimensional stacked integration is that it allows the proposed structure to obtain an electric field of below 0.6 MV/cm in the gate oxide and SBD contacts and achieve ~10% lower forward voltage of SBDs than the planar gate SBD-integrated MOSFET (PSI-MOS) and the trench gate structure with three p-type-protecting layers (TPL-MOS). The dual-SBD-integrated MOSFET (DSI-MOS) also highlights the better influences of the more than 70% reduction in the miller charge, as well as the over 50% reduction in switching loss compared to the others. Furthermore, the short-circuit (SC) robustness of the three devices was identified. The DSI-MOS attains the critical energy and the aluminum melting point in a longer SC time interval than the TPL-MOS. The p-shield layers in the DSI-MOS are demonstrated to yield the huge benefit of improving the reliability of the contacts when SC reliability is considered.
- 21 February 2025
- Published by MDPI AG in Electronics
- Vol. 14 (5) , 853
Open AccessShort-Circuit Characteristic Analysis of SiC Trench MOSFETs with Dual Integrated Schottky Barrier Diodes
A 4H-silicon carbide (SiC) trench gate metal–oxide–semiconductor field-effect transistor (MOSFET) with dual integrated Schottky barrier diodes (SBDs) was characterized using numerical simulations. The advantage of three-dimensional stacked integration is that it allows the proposed structure to obtain an electric field of below 0.6 MV/cm in the gate oxide and SBD contacts and achieve ~10% lower forward voltage of SBDs than the planar gate SBD-integrated MOSFET (PSI-MOS) and the trench gate structure with three p-type-protecting layers (TPL-MOS). The dual-SBD-integrated MOSFET (DSI-MOS) also highlights the better influences of the more than 70% reduction in the miller charge, as well as the over 50% reduction in switching loss compared to the others. Furthermore, the short-circuit (SC) robustness of the three devices was identified. The DSI-MOS attains the critical energy and the aluminum melting point in a longer SC time interval than the TPL-MOS. The p-shield layers in the DSI-MOS are demonstrated to yield the huge benefit of improving the reliability of the contacts when SC reliability is considered.