Ahmed Afifi

This article presents a 124–161-GHz radio frequency (RF) front end beamformer channel implemented in GlobalFoundries 45RFSOI technology. A key element in the beamformer is a 5-bit phase shifter with very low root mean square (rms) phase error and rms gain error. The phase shifter employs a Lange coupler for IQ signal generation and a dual current-steering (DCS) variable gain amplifier (VGA) for controlling the in-phase (I) and quadrature (Q) gains. Measurements show a minimum rms phase error of 0.4° and <5.6° at 124–161 GHz and with an rms gain error of 0.5 dB. The beamformer achieves a maximum data rate of 48 Gb/s with 16 QAM and 64 QAM modulations and an error-vector magnitude (EVM) of 10.7% and 6.1%, respectively, at 142.5 GHz. To the authors’ knowledge, this work achieves the lowest rms phase and gain errors across a wide frequency range among other D-band designs.

This article presents a multi-band 5.3–18-GHz low-noise amplifier (LNA) for 6G applications in GlobalFoundries 22FDX technology. The LNA consists of two stages employing tunable LC inter-stage and output matching networks. Using this technique, a sub-2 dB noise figure (NF) across three bands of operation is achieved. The measured results show three different frequency range 3 (FR3) bands with 3 dB bandwidths of 5.3–9.4 GHz, 8.3–13 GHz, and 11.5–18 GHz with a NF of 1.6–1.8 dB, 1.6–1.8 dB, and 1.8–2.2 dB, respectively. The LNA also operates in a wide-band mode with a bandwidth of 6.6–16.3 GHz and a NF of 2.4–3.2 dB. The LNA achieves an $\text {IP}_{\text {1dB}}$ of −18 to −22 dBm, and an IIP₃ of −8.7 to −12.7 dBm for the three bands, and consumes 20 mW from a 1 V supply. The multi-band LNA also shows fourth-order filtering characteristics, which greatly relaxes the requirements of external filters. Results are compared to prior work and show state-of-the-art performance.

This article presents an ultrawideband 131–173-GHz dual-channel receiver implemented in GlobalFoundaries 45RFSOI technology for sub-THz sixth-generation (6G) applications. This system employs two V/H channels, each consisting of three-stage LNAs, a mixer, and an IF amplifier, and with a $\times$ 6 local oscillator (LO) frequency multiplier to reduce the chip LO input frequency to 17–23 GHz. The receiver achieves a state-of-the-art minimum NF of 5.7 dB with a gain of 24.4 dB, an $\text{IP}_{1\text{dB}}$ of $-$ 32.5 to $-$ 28 dBm, and an $\text{IIP}_3$ of $-$ 21 to $-$ 20 dBm. A maximum data rate of $2{$ $\times$ $} 40$ Gb/s is achieved with 32 quadrature amplitude modulation (QAM) modulation and error vector magnitudes (EVMs) of 13.5 $\%$ , 11.3 $\%$ , 9.8 $\%$ , 10.3 $\%$ , and 10.8 $\%$ in 8-GHz frequency bands centered at 136, 144, 152, 160, and 168 GHz, respectively. The chip core area is 0.77 $\text{mm}^2$ and consumes 297, with 179 mW consumed in the LO path. To the authors’ knowledge, this work achieves the lowest NF across a wide frequency range among other $D$ -band fully integrated receive channels.