Zeyuan Yu
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Research Subjects
Zeyuan Yu has a total of 5 co-authors. Here are the top co-authors by number of shared publications:
- Guiyu Shen
School of Microelectronics, Northwestern Polytechnical University, Xian, China
1 shared publication - He Guan
School of Microelectronics, Northwestern Polytechnical University, Xi’an 710129, China
1 shared publication - Ying Wang
School of Microelectronics, Northwestern Polytechnical University, Xian, China
1 shared publication - Yongchuan Tang
School of Integrated Circuits and Microelectronics, Northwestern Polytechnical University, Xi’an 710072, China
1 shared publication Yulong Fang
Hebei Semiconductor Research Institute, Shijiazhuang, Hebei, China
1 shared publication
Latest Publications
- Open Access
- 17 November 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of the Electron Devices Society
- Vol. 13, 1158-1167
Enhanced Low-Damage Quantitative Hybrid Cyclic Etching for AlGaN/GaN Heteroepitaxy: Process Optimization and Device Performance Improvement
The etching process is pivotal in the fabrication of GaN-based devices, directly influencing their performance. This study presents an enhanced low-damage hybrid cyclic etching technology for AlGaN/GaN heteroepitaxy structures, combining oxygen plasma oxidation with HCl etching to achieve atomic-scale precision. By carefully controlling the oxidation layer thickness, this method preserves a low surface roughness of 0.228 nm and achieves an etching rate of 0.45 nm/cycle with excellent consistency. Compared to conventional ICP dry etching and KOH wet etching evaluated under identical experimental conditions, the proposed technique significantly reduces etching-induced-damage. When applied to the ohmic contact formation of AlGaN/GaN HEMTs using the same metallization scheme and annealing process, devices fabricated with the new hybrid etching method demonstrated a significantly lower contact resistance of 0.76 Ω7mm compared to those using conventional ICP etching (1.21 Ω7mm) or no additional etching after SiN removal (1.37 Ω7mm). Furthermore, these devices exhibited a threshold voltage of -6.5 V, a saturation drain current density of 880.55 mA/mm, and a knee voltage of approximately 4 V. This method also demonstrates potential for recessed gate etching and post-dry-etching damage repair, offering a promising solution for low-roughness surfaces processing with broad application prospects.
- 17 November 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of the Electron Devices Society
- Vol. 13, 1158-1167
Open AccessEnhanced Low-Damage Quantitative Hybrid Cyclic Etching for AlGaN/GaN Heteroepitaxy: Process Optimization and Device Performance Improvement
The etching process is pivotal in the fabrication of GaN-based devices, directly influencing their performance. This study presents an enhanced low-damage hybrid cyclic etching technology for AlGaN/GaN heteroepitaxy structures, combining oxygen plasma oxidation with HCl etching to achieve atomic-scale precision. By carefully controlling the oxidation layer thickness, this method preserves a low surface roughness of 0.228 nm and achieves an etching rate of 0.45 nm/cycle with excellent consistency. Compared to conventional ICP dry etching and KOH wet etching evaluated under identical experimental conditions, the proposed technique significantly reduces etching-induced-damage. When applied to the ohmic contact formation of AlGaN/GaN HEMTs using the same metallization scheme and annealing process, devices fabricated with the new hybrid etching method demonstrated a significantly lower contact resistance of 0.76 Ω7mm compared to those using conventional ICP etching (1.21 Ω7mm) or no additional etching after SiN removal (1.37 Ω7mm). Furthermore, these devices exhibited a threshold voltage of -6.5 V, a saturation drain current density of 880.55 mA/mm, and a knee voltage of approximately 4 V. This method also demonstrates potential for recessed gate etching and post-dry-etching damage repair, offering a promising solution for low-roughness surfaces processing with broad application prospects.