Longge Deng
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Longge Deng has a total of 19 co-authors. Here are the top co-authors by number of shared publications:
Bin Hou
School of Microelectronics, Xidian University, Xian, China
2 shared publications- Hao Lu
Xidian University
2 shared publications - Ling Yang
Xidian University
2 shared publications Meng Zhang
School of Microelectronics, Xidian University, Xian, China
2 shared publications- Xiaohua Ma
Xidian University
2 shared publications - Yue Hao
Xidian University
2 shared publications
Latest Publications
- 14 September 2026
- Published by AIP Publishing in Applied Physics Letters
- Vol. 129 (11)
Suppression of back-gating effects in GaN-on-Si p-GaN gate double-channel HEMT by enhanced storage and spreading of photon-generated holes
This work demonstrates effective suppression of back-gating effects in Schottky-type p-GaN gate double-channel high-electron-mobility transistors (DC-HEMTs) under ultraviolet (UV) illumination, offering a promising pathway for monolithic integration of half-bridge circuits. When the DC-HEMTs are subjected to UV illumination, electron–hole pairs (EHPs) are generated in the access regions by incident photons from an external 340-nm UV light-emitting diode and subsequently separated by the vertical electric field induced by either a negative substrate bias (VSUB) or buffer electron trapping. The photon-generated electrons migrate toward the two-dimensional electron gas (2DEG) channels, thereby restoring the 2DEG in the access regions. Critically, a dedicated hole-spreading channel is formed between the closely coupled 2DEG channels, enabling efficient storage and transport of photon-generated holes. Those holes generated in the upper channel are partially blocked by the thin AlN insertion layer (AlN-ISL) and then spread along the intermediate channel toward the gated region that is not exposed to UV light. The resulting hole storage beneath the entire active channel provides effective screening to the upper channel and induces electrons in the lower channel to compensate back-gating effects. The hole-spreading dynamics can be described by the drift-diffusion model, which indicates an efficient spreading process. These findings highlight the significant potential of the p-GaN gate DC platform for integrated half-bridge circuits by harnessing the photon-generated carriers to suppress the back-gating effects.
- 14 September 2026
- Published by AIP Publishing in Applied Physics Letters
- Vol. 129 (11)
Suppression of back-gating effects in GaN-on-Si p-GaN gate double-channel HEMT by enhanced storage and spreading of photon-generated holes
This work demonstrates effective suppression of back-gating effects in Schottky-type p-GaN gate double-channel high-electron-mobility transistors (DC-HEMTs) under ultraviolet (UV) illumination, offering a promising pathway for monolithic integration of half-bridge circuits. When the DC-HEMTs are subjected to UV illumination, electron–hole pairs (EHPs) are generated in the access regions by incident photons from an external 340-nm UV light-emitting diode and subsequently separated by the vertical electric field induced by either a negative substrate bias (VSUB) or buffer electron trapping. The photon-generated electrons migrate toward the two-dimensional electron gas (2DEG) channels, thereby restoring the 2DEG in the access regions. Critically, a dedicated hole-spreading channel is formed between the closely coupled 2DEG channels, enabling efficient storage and transport of photon-generated holes. Those holes generated in the upper channel are partially blocked by the thin AlN insertion layer (AlN-ISL) and then spread along the intermediate channel toward the gated region that is not exposed to UV light. The resulting hole storage beneath the entire active channel provides effective screening to the upper channel and induces electrons in the lower channel to compensate back-gating effects. The hole-spreading dynamics can be described by the drift-diffusion model, which indicates an efficient spreading process. These findings highlight the significant potential of the p-GaN gate DC platform for integrated half-bridge circuits by harnessing the photon-generated carriers to suppress the back-gating effects.
- 28 May 2026
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. PP (07413106) , 1
High Power Density Millimeter-Wave Ultra-thin InGaN Channel DH-HEMTs
This letter presents high-performance millimeter-wave InGaN channel double-heterostructure high-electron-mobility transistors (DH-HEMTs) fabricated using a recess gate oxidation process. The device with a 2 μm source-drain distance achieves a remarkable breakdown voltage of 76 V. When subjected to off-state high field bias conditions (-8 V, 30 V), the device exhibits a low saturation current collapse ratio of 8.1%. In 30 GHz large-signal power measurements, the device achieves a high saturation power density of 9.6 W/mm at VDS=28 V and a high power-added efficiency (PAE) of 48.54% at VDS=14 V. High-temperature stability test of the InGaN channel DH-HEMTs was also evaluated. These results substantiate the significant potential of InGaN channel DH-HEMTs for millimeter-wave applications.
- 28 May 2026
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. PP (07413106) , 1
High Power Density Millimeter-Wave Ultra-thin InGaN Channel DH-HEMTs
This letter presents high-performance millimeter-wave InGaN channel double-heterostructure high-electron-mobility transistors (DH-HEMTs) fabricated using a recess gate oxidation process. The device with a 2 μm source-drain distance achieves a remarkable breakdown voltage of 76 V. When subjected to off-state high field bias conditions (-8 V, 30 V), the device exhibits a low saturation current collapse ratio of 8.1%. In 30 GHz large-signal power measurements, the device achieves a high saturation power density of 9.6 W/mm at VDS=28 V and a high power-added efficiency (PAE) of 48.54% at VDS=14 V. High-temperature stability test of the InGaN channel DH-HEMTs was also evaluated. These results substantiate the significant potential of InGaN channel DH-HEMTs for millimeter-wave applications.
- 12 May 2026
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 73 (6) , 3429-3434
High-PAE Gold-Free AlGaN/GaN HEMT With Al–Si Alloy Gate Fabrication Process for 5G Applications
In this article, we present gold-free AlGaN/GaN high electron mobility transistors (HEMTs) fabricated on SiC substrates using an Al–Si alloy gate fabrication process. The proposed devices incorporate a two-step deposited (TSD) Ti/Al/Ti/TiN metal stack with high-dose ion-implanted ohmic regions and implement an ohmic trench etching technique. This design achieves an ultralow ohmic contact resistance ( ${R}_{\text {C}}\text {)}$ of $0.18~\Omega~\cdot $ mm and a highly uniform surface morphology with a root-mean-squared (rms) roughness of 2.33 nm. In addition, the gate electrode employs a Ti/AlSi metal stack that is fully compatible with Si-based CMOS technology. Owing to the superior ohmic contact properties, the fabricated HEMTs exhibit a peak transconductance ( ${g}_{\text {m}}\text {)}$ of 302.2mS/mm and a saturation drain current ( ${I}_{\text {D, {max}}}\text {)}$ of 1.26 A/mm. Small-signal radio frequency (RF) measurements yield a cutoff frequency ( ${f}_{\text {T}}\text {)}$ of 23.9 GHz and a maximum oscillation frequency ( ${f}_{\max }\text {)}$ of 38.9 GHz. Furthermore, the TSD HEMT demonstrates an output power density ( ${P}_{\text {sat}}\text {)}$ of 3.9 W/mm and a peak power-added efficiency (PAE) of 63.1% at 3.6GHz. These findings highlight the potential of this approach in advancing high-performance and low-cost Au-free GaN HEMTs for sub-6 GHz RF applications.
- 12 May 2026
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 73 (6) , 3429-3434
High-PAE Gold-Free AlGaN/GaN HEMT With Al–Si Alloy Gate Fabrication Process for 5G Applications
In this article, we present gold-free AlGaN/GaN high electron mobility transistors (HEMTs) fabricated on SiC substrates using an Al–Si alloy gate fabrication process. The proposed devices incorporate a two-step deposited (TSD) Ti/Al/Ti/TiN metal stack with high-dose ion-implanted ohmic regions and implement an ohmic trench etching technique. This design achieves an ultralow ohmic contact resistance ( ${R}_{\text {C}}\text {)}$ of $0.18~\Omega~\cdot $ mm and a highly uniform surface morphology with a root-mean-squared (rms) roughness of 2.33 nm. In addition, the gate electrode employs a Ti/AlSi metal stack that is fully compatible with Si-based CMOS technology. Owing to the superior ohmic contact properties, the fabricated HEMTs exhibit a peak transconductance ( ${g}_{\text {m}}\text {)}$ of 302.2mS/mm and a saturation drain current ( ${I}_{\text {D, {max}}}\text {)}$ of 1.26 A/mm. Small-signal radio frequency (RF) measurements yield a cutoff frequency ( ${f}_{\text {T}}\text {)}$ of 23.9 GHz and a maximum oscillation frequency ( ${f}_{\max }\text {)}$ of 38.9 GHz. Furthermore, the TSD HEMT demonstrates an output power density ( ${P}_{\text {sat}}\text {)}$ of 3.9 W/mm and a peak power-added efficiency (PAE) of 63.1% at 3.6GHz. These findings highlight the potential of this approach in advancing high-performance and low-cost Au-free GaN HEMTs for sub-6 GHz RF applications.