Discrete-Trap Effects on 3-D NAND Variability – Part I: Threshold Voltage

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Abstract
In this two-part article we discuss the difference between a continuous and a discrete approach to trap modeling in the simulation of 3-D nand Flash memories with polysilicon channel. In Part I we focus on threshold voltage (VT) fluctuations induced by traps and show that lower values for the average and rms VT arise when the discrete nature of traps is accounted for. We explain such differences in terms of a stronger percolation that leads to a lower number of filled traps in the discrete-trap case, and investigate such differences as a function of cell parameters and temperature. Finally, we compare the two approaches showing that a continuous trap model cannot reproduce the correct dependences resulting from a discrete treatment.

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