Digital implementation of the feedforward loop of the asymmetrical half-bridge converter for LED lighting applications

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Abstract
The Asymmetrical Half Bridge converter (AHBC) has proven to be a promising candidate for LED lighting applications. It provides high efficiency, galvanic isolation and, at the same time, its output filter can be very small and, therefore, easily implemented without electrolytic capacitor. On the other hand, its main drawback is its poor attainable bandwidth. In any ac-dc LED lighting application, the input voltage of the AHBC is provided by a Power Factor Corrector (PFC) converter which has to be also implemented without electrolytic capacitor in order to assure the long lifetime of the whole LED driver. As a consequence, its output voltage (input voltage of the AHBC) is affected by a low-frequency ripple. Due to the poor bandwidth of the AHBC, this voltage ripple will be transferred to the converter output voltage, leading to flickering. A possible solution is using a feedforward loop for cancelling the effect of this low-frequency ripple without affecting stability. Due to the complex and non-linear transfer function of the AHBC, any analog feedforward loop has to be tuned for a given operating point, leading to a poor performance (i.e., high flickering, high ripple) when the AHBC moves away from that point. Dimming, which is a very frequent requirement in many LED drivers, implies large variations of the output voltage and, consequently, moving away from the aforementioned operating point. In this paper, a digital feedforward loop is proposed in order to solve this problem. The digital implementation allows the feedforward loop to perfectly cancel the ripple under any condition (e.g., output voltage variation due to dimming). Besides, despite its complex transfer function, this digital feedforward loop has been designed and optimized for its implementation in small-size microcontrollers. Experimental results with a 40-W prototype prove the usefulness of the proposed feedforward loop and the validity of the equations used in the optimized design.

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