A Heavy-Ion Tolerant Clock and Data Recovery Circuit for Satellite Embedded High-Speed Data Links
Authors:
- M. PignolMPM. Pignol
- F. MalouFMF. Malou
- C. NeveuCNC. Neveu
- V. PougetVPV. Pouget
- Y. DevalYDY. Deval
- J. B. BegueretJBJ. B. Begueret
- 12 December 2007
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 54 (6) , 2080-2085
Abstract
A clock and data recovery (CDR) circuit dedicated to satellite embedded high-speed data links is implemented in a 0.13 mum CMOS technology. Its radiation hardening is obtained thanks to an innovative architecture based on an injection-locked oscillator (ILO) associated with a phase-alignment circuit. Its low single-event transient (SET) sensitivity is shown thanks to heavy-ion and laser testing.Keywords
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