A 0.067-pJ/bit/dB Transmitter for Low-Power Memory Interfaces With Charge-Pump-Aided On-Demand Sub-Pre-Emphasis for Worst-Case Pattern Compensation

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Abstract
A single-ended transmitter (TX) employing a charge-pump-aided main and sub pre-emphasis feed-forward equalizer (FFE) for low-power memory interfaces is presented. By overcoming the voltage headroom limitation of VSS termination, the proposed scheme increases the voltage swing while compensating for channel loss. To mitigate FFE degradation at high data rates and under severe channel loss, an additional on-demand sub pull-up FFE driver and sub pull-down charge pump are introduced. These selectively enhance equalization during bit-toggling patterns and at transitions after consecutive identical digits, improving signal integrity compared with conventional designs. Fabricated in a 28-nm CMOS process, the TX occupies an active area of 0.0065 mm2 and achieves 18-Gb/s single-ended signal transmission over a channel with a –15.7 dB loss. The measured power consumption is 18.85 mW, corresponding to 1.05 pJ/bit and a figure of merit of 0.067 pJ/bit/dB.
Funding Information
  • Research Grant of Kwangwoon University in 2026 and in part by the National Research Foundation of Korea
  • Korean Government [Ministry of Science and ICT (MSIT)] (RS-2024-00334247)
  • Korean Government [Ministry of Science and ICT (MSIT)] (RS-2024-00414230)

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