Tutorial: Hardware-Aware Compilation and Simulation for In-Memory Computing
Authors:
- Asif Ali KhanAKAsif Ali Khan
- Hadjer BenmezianeHBHadjer Benmeziane
- Hamid FarzanehHFHamid Farzaneh
- Joao LimaJLJoao Lima
- William SimonWSWilliam Simon
- Yiyu ShiYSYiyu Shi
- Zheyu YanZYZheyu Yan
- Abu SebastianASAbu Sebastian
- X. Sharon HuXHX. Sharon Hu
- Jeronimo CastrillonJCJeronimo Castrillon
- Corey LammieCLCorey Lammie
Open Access
- 28 September 2025
- conference paper
- Published by Association for Computing Machinery (ACM)
- p. 31-32
Abstract
No abstract availableFunding Information
- Deutsche Forschungsgemeinschaft (528378584)
This publication has 6 references indexed in Scilit:
- Deep learning software stacks for analogue in-memory computing-based acceleratorsNature Reviews Electrical Engineering, 2025
- LionHeart: A Layer-Based Mapping Framework for Heterogeneous Systems With Analog In-Memory Computing TilesIEEE Transactions on Emerging Topics in Computing, 2025
- SHERLOCK: Scheduling Efficient and Reliable Bulk Bitwise Operations in NVMs2024
- Using the IBM analog in-memory hardware acceleration kit for neural network training and inferenceAPL Machine Learning, 2023
- Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based acceleratorsNature Communications, 2023
- Modeling and simulating in-memory memristive deep learning systems: An overview of current effortsArray, 2022