Single pulse short-circuit robustness and repetitive stress aging of GaN GITs

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Abstract
Short-circuit withstand capability is a key requirement for semiconductor power devices in a number of strategic application domains, including traction, renewable energies and power distribution. Indeed, though clearly a non-intentional operational mode, sort-circuit can be nonetheless a relatively frequent event. Due to its associated considerable electro-thermal stress levels, a thorough analysis of both single pulse withstand capability and device aging as a result of repetitive stress are mandatory before widespread deployment of new device technologies. In this paper, the focus is on latest generation commercial gate-injection GaN transistors, in the 600 V rating class. Extensive experimental analysis is presented, putting forward an interpretation of the underlying degradation and failure mechanisms, supported by coupled electro-thermal device models, incorporating both the functional and structural characteristics of the devices. The findings highlight a remarkable robustness of a specific type of p-gate GaN HEMTs, referred to as gate injection transistors (GITs), against short-circuit stress, making them a potentially very attractive and competitive technology in the voltage class of relevance.

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