Design of a 10.56-Gb/s 64-QAM Polar Transmitter at 60 GHz in 28-nm CMOS

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Abstract
Improving the energy efficiency of wireless communication transmitters is an increasingly important target now that millimeter-wave (mm-wave) frequencies are being used. To improve the efficiency compared with classical transmit architectures that use a class A/AB power amplifier (PA), we propose here a polar transmitter that operates around 60 GHz. This transmitter is based on a radio frequency digital-to-analog converter (RF-DAC). This RF-DAC uses a switching scheme that greatly reduces signal leakage via disabled unit cells which greatly improves the output signal quality. In this way, this polar transmitter can process higher order modulation schemes at mm-wave frequencies, such as a 64-QAM, where an excellent error vector magnitude (EVM) specification is required. This mm-wave polar transmitter, prototyped in a 28-nm CMOS technology, consists of a digital PA (DPA) using 7-bit RF-DACs for amplitude modulation (AM),and an active phase shifter (PS) using two 7-bit variable gain amplifiers (VGAs) with an in-phase quadrature (IQ)-hybrid for phase modulation (PM). All the amplitude and phase samples for the RF core are accessed from an on-chip memory. Static measurements show a power gain of 21.5 dB, a saturated output power ( $P_{\text{sat}}$ ) of 12.6 dBm, and a peak drain efficiency of 25.9 $\%$ at 64 GHz. A 10.56-Gb/s 64-QAM signal at $-$ 27.8-dB EVM is demonstrated with measured core and system efficiencies of 8.5 $\%$ and 3.9 $\%$ , respectively. The transmitter consumes 159-mA current from a 0.9-V supply.

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