Impact of Technology Scaling on SRAM Soft Error Rates
Authors:
- 14 November 2014
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 61 (6) , 3512-3518
Abstract
Soft error rates for triple-well and dual-well SRAM circuits over the past few technology generations have shown an apparently inconsistent behavior. This work compares the heavy-ion induced upset cross-section in 28, 40, and 65 nm dual- and triple-well SRAMs over a wide range of particle LETs. Similar experiments on identical layouts for all these technologies along with 3-D TCAD simulations are used to identify the dominant mechanisms for single-event upsets. Results demonstrate that the well-engineering strongly influence the single-event response of SRAMs. Layout also plays an important role and the combined effects of well-engineering and layout determine the soft-error sensitivity of SRAMs fabricated in advanced technology nodes.Keywords
Funding Information
- Cisco Systems Inc
- DTRA Radiation-Hardened Microelectronics Program
This publication has 16 references indexed in Scilit:
- Effects of charge confinement and angular strikes in 40 nm dual- and triple-well bulk CMOS SRAMs2012
- Single-Event Charge Collection and Upset in 40-nm Dual- and Triple-Well Bulk CMOS SRAMsIEEE Transactions on Nuclear Science, 2011
- Neutron-Induced Charge Collection Simulation of Bulk FinFET SRAMs Compared With Conventional Planar SRAMsIEEE Transactions on Device and Materials Reliability, 2011
- The Effect of Layout Topology on Single-Event Transient Pulse Quenching in a 65 nm Bulk CMOS ProcessIEEE Transactions on Nuclear Science, 2010
- Single-Event Transient Pulse Quenching in Advanced CMOS Logic CircuitsIEEE Transactions on Nuclear Science, 2009
- Single Event Mechanisms in 90 nm Triple-Well CMOS DevicesIEEE Transactions on Nuclear Science, 2008
- Alpha-particle SEU performance of SRAM with triple wellIEEE Transactions on Nuclear Science, 2004
- An ultrawideband CMOS low-noise amplifier for 3.1-10.6-GHz wireless receiversIEEE Journal of Solid-State Circuits, 2004
- Characterization of multi-bit soft error events in advanced SRAMs2004
- The effects of ion track structure in simulating single event phenomena2002